Commit 30f010f5 authored by Hongzhou Yang's avatar Hongzhou Yang Committed by Linus Walleij

arm64: mediatek: Add Pinctrl/GPIO/EINT driver for mt8173.

Add mt8173 support using mediatek common pinctrl driver.
MT8173 have a different ies_smt setting register than mt8135,
so adding this support to common code.
Signed-off-by: default avatarHongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent d9819eb9
...@@ -11,4 +11,8 @@ config PINCTRL_MT8135 ...@@ -11,4 +11,8 @@ config PINCTRL_MT8135
def_bool MACH_MT8135 def_bool MACH_MT8135
select PINCTRL_MTK_COMMON select PINCTRL_MTK_COMMON
config PINCTRL_MT8173
def_bool MACH_MT8173
select PINCTRL_MTK_COMMON
endif endif
...@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_MTK_COMMON) += pinctrl-mtk-common.o ...@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_MTK_COMMON) += pinctrl-mtk-common.o
# SoC Drivers # SoC Drivers
obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
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...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/interrupt.h>
#include <dt-bindings/pinctrl/mt65xx.h> #include <dt-bindings/pinctrl/mt65xx.h>
#include "../core.h" #include "../core.h"
...@@ -111,6 +112,19 @@ static void mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, ...@@ -111,6 +112,19 @@ static void mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
{ {
unsigned int reg_addr, offset; unsigned int reg_addr, offset;
unsigned int bit; unsigned int bit;
int ret;
/*
* Due to some pins are irregular, their input enable and smt
* control register are discontinuous, but they are mapping together.
* So we need this special handle.
*/
if (pctl->devdata->spec_ies_smt_set) {
ret = pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
pin, pctl->devdata->port_align, value);
if (!ret)
return;
}
bit = BIT(pin & 0xf); bit = BIT(pin & 0xf);
......
...@@ -154,6 +154,11 @@ struct mtk_eint_offsets { ...@@ -154,6 +154,11 @@ struct mtk_eint_offsets {
* up/down bit, R0 and R1 resistor bit, so they need special pull setting. * up/down bit, R0 and R1 resistor bit, so they need special pull setting.
* If special setting is success, this should return 0, otherwise it should * If special setting is success, this should return 0, otherwise it should
* return non-zero value. * return non-zero value.
* @spec_ies_smt_set: Some pins are irregular, their input enable and smt
* control register are discontinuous, but they are mapping together. That
* means when user set smt, input enable is set at the same time. So they
* also need special control. If special control is success, this should
* return 0, otherwise return non-zero value.
* *
* @dir_offset: The direction register offset. * @dir_offset: The direction register offset.
* @pullen_offset: The pull-up/pull-down enable register offset. * @pullen_offset: The pull-up/pull-down enable register offset.
...@@ -177,6 +182,8 @@ struct mtk_pinctrl_devdata { ...@@ -177,6 +182,8 @@ struct mtk_pinctrl_devdata {
unsigned int n_pin_drv_grps; unsigned int n_pin_drv_grps;
int (*spec_pull_set)(struct regmap *reg, unsigned int pin, int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
unsigned char align, bool isup, unsigned int arg); unsigned char align, bool isup, unsigned int arg);
int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
unsigned char align, int value);
unsigned int dir_offset; unsigned int dir_offset;
unsigned int ies_offset; unsigned int ies_offset;
unsigned int smt_offset; unsigned int smt_offset;
......
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