Commit 312e95c6 authored by Lars Povlsen's avatar Lars Povlsen Committed by Sebastian Reichel

dt-bindings: reset: ocelot: Add Sparx5 support

This adds the support for the Sparx5 SoC.
Signed-off-by: default avatarLars Povlsen <lars.povlsen@microchip.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.com>
parent 8ae237ec
Microsemi Ocelot reset controller Microsemi Ocelot reset controller
The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the
SoC MIPS core. SoC core.
The reset registers are both present in the MSCC vcoreiii MIPS and
microchip Sparx5 armv8 SoC's.
Required Properties: Required Properties:
- compatible: "mscc,ocelot-chip-reset" - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
Example: Example:
reset@1070008 { reset@1070008 {
......
...@@ -11515,6 +11515,7 @@ M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com> ...@@ -11515,6 +11515,7 @@ M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
S: Supported S: Supported
F: Documentation/devicetree/bindings/mips/mscc.txt F: Documentation/devicetree/bindings/mips/mscc.txt
F: Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
F: arch/mips/boot/dts/mscc/ F: arch/mips/boot/dts/mscc/
F: arch/mips/configs/generic/board-ocelot.config F: arch/mips/configs/generic/board-ocelot.config
F: arch/mips/generic/board-ocelot.c F: arch/mips/generic/board-ocelot.c
......
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