Commit 33573c0e authored by Paul Mundt's avatar Paul Mundt

sh: Fix occasional flush_cache_4096() stack corruption.

IRQs disabling in flush_cache_4096 for cache purge. Under certain
workloads we would get an IRQ in the middle of a purge operation,
and the cachelines would remain in an inconsistent state, leading
to occasional stack corruption.
Signed-off-by: default avatarTakeo Takahashi <takahashi.takeo@renesas.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent f3c25758
...@@ -221,22 +221,20 @@ void flush_cache_sigtramp(unsigned long addr) ...@@ -221,22 +221,20 @@ void flush_cache_sigtramp(unsigned long addr)
static inline void flush_cache_4096(unsigned long start, static inline void flush_cache_4096(unsigned long start,
unsigned long phys) unsigned long phys)
{ {
unsigned long flags, exec_offset = 0;
/* /*
* All types of SH-4 require PC to be in P2 to operate on the I-cache. * All types of SH-4 require PC to be in P2 to operate on the I-cache.
* Some types of SH-4 require PC to be in P2 to operate on the D-cache. * Some types of SH-4 require PC to be in P2 to operate on the D-cache.
*/ */
if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) || if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) ||
(start < CACHE_OC_ADDRESS_ARRAY)) { (start < CACHE_OC_ADDRESS_ARRAY))
unsigned long flags; exec_offset = 0x20000000;
local_irq_save(flags); local_irq_save(flags);
__flush_cache_4096(start | SH_CACHE_ASSOC, __flush_cache_4096(start | SH_CACHE_ASSOC,
P1SEGADDR(phys), 0x20000000); P1SEGADDR(phys), exec_offset);
local_irq_restore(flags); local_irq_restore(flags);
} else {
__flush_cache_4096(start | SH_CACHE_ASSOC,
P1SEGADDR(phys), 0);
}
} }
/* /*
......
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