Commit 339754ff authored by Ajay Singh's avatar Ajay Singh Committed by Kalle Valo

wilc1000: added queue support for WMM

Added multiple queues[BK,BE,VI,VO] to handle different priority data
packets. Before adding a packet to the queue, checked its priority from
the header, and then add to the suitable queue. The limit for each queue
is maintained separately. Also while passing the packets to the firmware
via VMM take care to select data packets based on priority and available
space.
Signed-off-by: default avatarAjay Singh <ajay.kathat@microchip.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20201125114059.10006-6-ajay.kathat@microchip.com
parent 9c172f30
......@@ -1709,7 +1709,7 @@ int wilc_cfg80211_init(struct wilc **wilc, struct device *dev, int io_type,
{
struct wilc *wl;
struct wilc_vif *vif;
int ret;
int ret, i;
wl = wilc_create_wiphy(dev);
if (!wl)
......@@ -1725,7 +1725,10 @@ int wilc_cfg80211_init(struct wilc **wilc, struct device *dev, int io_type,
wl->io_type = io_type;
wl->hif_func = ops;
wl->chip_ps_state = WILC_CHIP_WAKEDUP;
INIT_LIST_HEAD(&wl->txq_head.list);
for (i = 0; i < NQUEUES; i++)
INIT_LIST_HEAD(&wl->txq[i].txq_head.list);
INIT_LIST_HEAD(&wl->rxq_head.list);
INIT_LIST_HEAD(&wl->vif_list);
......
......@@ -197,6 +197,14 @@ struct wilc_vif {
struct cfg80211_bss *bss;
};
struct wilc_tx_queue_status {
u8 buffer[AC_BUFFER_SIZE];
u16 end_index;
u16 cnt[NQUEUES];
u16 sum;
bool initialized;
};
struct wilc {
struct wiphy *wiphy;
const struct wilc_hif_func *hif_func;
......@@ -245,9 +253,10 @@ struct wilc {
u32 rx_buffer_offset;
u8 *tx_buffer;
struct txq_entry_t txq_head;
struct txq_handle txq[NQUEUES];
int txq_entries;
struct wilc_tx_queue_status tx_q_limit;
struct rxq_entry_t rxq_head;
const struct firmware *firmware;
......
......@@ -207,6 +207,18 @@
#define MODALIAS "WILC_SPI"
#define NQUEUES 4
#define AC_BUFFER_SIZE 1000
#define VO_AC_COUNT_FIELD GENMASK(31, 25)
#define VO_AC_ACM_STAT_FIELD BIT(24)
#define VI_AC_COUNT_FIELD GENMASK(23, 17)
#define VI_AC_ACM_STAT_FIELD BIT(16)
#define BE_AC_COUNT_FIELD GENMASK(15, 9)
#define BE_AC_ACM_STAT_FIELD BIT(8)
#define BK_AC_COUNT_FIELD GENMASK(7, 3)
#define BK_AC_ACM_STAT_FIELD BIT(1)
#define WILC_PKT_HDR_CONFIG_FIELD BIT(31)
#define WILC_PKT_HDR_OFFSET_FIELD GENMASK(30, 22)
#define WILC_PKT_HDR_TOTAL_LEN_FIELD GENMASK(21, 11)
......@@ -295,10 +307,17 @@
* Tx/Rx Queue Structure
*
********************************************/
enum ip_pkt_priority {
AC_VO_Q = 0,
AC_VI_Q = 1,
AC_BE_Q = 2,
AC_BK_Q = 3
};
struct txq_entry_t {
struct list_head list;
int type;
u8 q_num;
int ack_idx;
u8 *buffer;
int buffer_size;
......@@ -308,6 +327,17 @@ struct txq_entry_t {
void (*tx_complete_func)(void *priv, int status);
};
struct txq_fw_recv_queue_stat {
u8 acm;
u8 count;
};
struct txq_handle {
struct txq_entry_t txq_head;
u16 count;
struct txq_fw_recv_queue_stat fw;
};
struct rxq_entry_t {
struct list_head list;
u8 *buffer;
......
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