Commit 33b3ad37 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Alex Deucher

drm/radeon: handle PCIe root ports with addressing limitations

radeon uses a need_dma32 flag to indicate to the drm core that some
allocations need to be done using GFP_DMA32, but it only checks the
device addressing capabilities to make that decision.  Unfortunately
PCIe root ports that have limited addressing exist as well.  Use the
dma_addressing_limited instead to also take those into account.
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reported-by: default avatarAtish Patra <Atish.Patra@wdc.com>
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b8cf3219
...@@ -2386,7 +2386,6 @@ struct radeon_device { ...@@ -2386,7 +2386,6 @@ struct radeon_device {
struct radeon_wb wb; struct radeon_wb wb;
struct radeon_dummy_page dummy_page; struct radeon_dummy_page dummy_page;
bool shutdown; bool shutdown;
bool need_dma32;
bool need_swiotlb; bool need_swiotlb;
bool accel_working; bool accel_working;
bool fastfb_working; /* IGP feature*/ bool fastfb_working; /* IGP feature*/
......
...@@ -1365,27 +1365,25 @@ int radeon_device_init(struct radeon_device *rdev, ...@@ -1365,27 +1365,25 @@ int radeon_device_init(struct radeon_device *rdev,
else else
rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */ rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */
/* set DMA mask + need_dma32 flags. /* set DMA mask.
* PCIE - can handle 40-bits. * PCIE - can handle 40-bits.
* IGP - can handle 40-bits * IGP - can handle 40-bits
* AGP - generally dma32 is safest * AGP - generally dma32 is safest
* PCI - dma32 for legacy pci gart, 40 bits on newer asics * PCI - dma32 for legacy pci gart, 40 bits on newer asics
*/ */
rdev->need_dma32 = false; dma_bits = 40;
if (rdev->flags & RADEON_IS_AGP) if (rdev->flags & RADEON_IS_AGP)
rdev->need_dma32 = true; dma_bits = 32;
if ((rdev->flags & RADEON_IS_PCI) && if ((rdev->flags & RADEON_IS_PCI) &&
(rdev->family <= CHIP_RS740)) (rdev->family <= CHIP_RS740))
rdev->need_dma32 = true; dma_bits = 32;
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
if (rdev->family == CHIP_CEDAR) if (rdev->family == CHIP_CEDAR)
rdev->need_dma32 = true; dma_bits = 32;
#endif #endif
dma_bits = rdev->need_dma32 ? 32 : 40;
r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits)); r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));
if (r) { if (r) {
rdev->need_dma32 = true;
dma_bits = 32; dma_bits = 32;
pr_warn("radeon: No suitable DMA available\n"); pr_warn("radeon: No suitable DMA available\n");
} }
......
...@@ -794,7 +794,7 @@ int radeon_ttm_init(struct radeon_device *rdev) ...@@ -794,7 +794,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
r = ttm_bo_device_init(&rdev->mman.bdev, r = ttm_bo_device_init(&rdev->mman.bdev,
&radeon_bo_driver, &radeon_bo_driver,
rdev->ddev->anon_inode->i_mapping, rdev->ddev->anon_inode->i_mapping,
rdev->need_dma32); dma_addressing_limited(&rdev->pdev->dev));
if (r) { if (r) {
DRM_ERROR("failed initializing buffer object driver(%d).\n", r); DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
return r; return r;
......
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