Commit 346cc220 authored by Tony Lindgren's avatar Tony Lindgren

Merge branch 'for-tony' of...

Merge branch 'for-tony' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into omap-for-v4.4/soc
parents 3ea4a182 bf4c9449
...@@ -96,6 +96,7 @@ config ARCH_OMAP2PLUS ...@@ -96,6 +96,7 @@ config ARCH_OMAP2PLUS
select SOC_BUS select SOC_BUS
select TI_PRIV_EDMA select TI_PRIV_EDMA
select OMAP_IRQCHIP select OMAP_IRQCHIP
select CLKSRC_TI_32K
help help
Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
......
...@@ -46,7 +46,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") ...@@ -46,7 +46,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
.map_io = omap242x_map_io, .map_io = omap242x_map_io,
.init_early = omap2420_init_early, .init_early = omap2420_init_early,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.init_time = omap2_sync32k_timer_init, .init_time = omap_init_time,
.dt_compat = omap242x_boards_compat, .dt_compat = omap242x_boards_compat,
.restart = omap2xxx_restart, .restart = omap2xxx_restart,
MACHINE_END MACHINE_END
...@@ -63,7 +63,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") ...@@ -63,7 +63,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
.map_io = omap243x_map_io, .map_io = omap243x_map_io,
.init_early = omap2430_init_early, .init_early = omap2430_init_early,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.init_time = omap2_sync32k_timer_init, .init_time = omap_init_time,
.dt_compat = omap243x_boards_compat, .dt_compat = omap243x_boards_compat,
.restart = omap2xxx_restart, .restart = omap2xxx_restart,
MACHINE_END MACHINE_END
...@@ -82,7 +82,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board") ...@@ -82,7 +82,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
.init_early = omap3430_init_early, .init_early = omap3430_init_early,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.init_late = omap3_init_late, .init_late = omap3_init_late,
.init_time = omap3_sync32k_timer_init, .init_time = omap_init_time,
.dt_compat = n900_boards_compat, .dt_compat = n900_boards_compat,
.restart = omap3xxx_restart, .restart = omap3xxx_restart,
MACHINE_END MACHINE_END
...@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") ...@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.init_early = omap3430_init_early, .init_early = omap3430_init_early,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.init_late = omap3_init_late, .init_late = omap3_init_late,
.init_time = omap3_sync32k_timer_init, .init_time = omap_init_time,
.dt_compat = omap3_boards_compat, .dt_compat = omap3_boards_compat,
.restart = omap3xxx_restart, .restart = omap3xxx_restart,
MACHINE_END MACHINE_END
...@@ -116,7 +116,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") ...@@ -116,7 +116,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
.init_early = omap3630_init_early, .init_early = omap3630_init_early,
.init_machine = omap_generic_init, .init_machine = omap_generic_init,
.init_late = omap3_init_late, .init_late = omap3_init_late,
.init_time = omap3_sync32k_timer_init, .init_time = omap_init_time,
.dt_compat = omap36xx_boards_compat, .dt_compat = omap36xx_boards_compat,
.restart = omap3xxx_restart, .restart = omap3xxx_restart,
MACHINE_END MACHINE_END
......
...@@ -424,6 +424,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") ...@@ -424,6 +424,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
.init_irq = omap3_init_irq, .init_irq = omap3_init_irq,
.init_machine = omap_ldp_init, .init_machine = omap_ldp_init,
.init_late = omap3430_init_late, .init_late = omap3430_init_late,
.init_time = omap3_sync32k_timer_init, .init_time = omap_init_time,
.restart = omap3xxx_restart, .restart = omap3xxx_restart,
MACHINE_END MACHINE_END
...@@ -136,6 +136,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") ...@@ -136,6 +136,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
.init_irq = omap3_init_irq, .init_irq = omap3_init_irq,
.init_machine = rx51_init, .init_machine = rx51_init,
.init_late = omap3430_init_late, .init_late = omap3430_init_late,
.init_time = omap3_sync32k_timer_init, .init_time = omap_init_time,
.restart = omap3xxx_restart, .restart = omap3xxx_restart,
MACHINE_END MACHINE_END
...@@ -88,8 +88,7 @@ static inline int omap_mux_late_init(void) ...@@ -88,8 +88,7 @@ static inline int omap_mux_late_init(void)
extern void omap2_init_common_infrastructure(void); extern void omap2_init_common_infrastructure(void);
extern void omap2_sync32k_timer_init(void); extern void omap_init_time(void);
extern void omap3_sync32k_timer_init(void);
extern void omap3_secure_sync32k_timer_init(void); extern void omap3_secure_sync32k_timer_init(void);
extern void omap3_gptimer_timer_init(void); extern void omap3_gptimer_timer_init(void);
extern void omap4_local_timer_init(void); extern void omap4_local_timer_init(void);
......
...@@ -183,7 +183,8 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id * ...@@ -183,7 +183,8 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
of_get_property(np, "ti,timer-secure", NULL))) of_get_property(np, "ti,timer-secure", NULL)))
continue; continue;
of_add_property(np, &device_disabled); if (!of_device_is_compatible(np, "ti,omap-counter32k"))
of_add_property(np, &device_disabled);
return np; return np;
} }
...@@ -394,7 +395,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) ...@@ -394,7 +395,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
int ret; int ret;
struct device_node *np = NULL; struct device_node *np = NULL;
struct omap_hwmod *oh; struct omap_hwmod *oh;
void __iomem *vbase;
const char *oh_name = "counter_32k"; const char *oh_name = "counter_32k";
/* /*
...@@ -420,18 +420,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) ...@@ -420,18 +420,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
omap_hwmod_setup_one(oh_name); omap_hwmod_setup_one(oh_name);
if (np) {
vbase = of_iomap(np, 0);
of_node_put(np);
} else {
vbase = omap_hwmod_get_mpu_rt_va(oh);
}
if (!vbase) {
pr_warn("%s: failed to get counter_32k resource\n", __func__);
return -ENXIO;
}
ret = omap_hwmod_enable(oh); ret = omap_hwmod_enable(oh);
if (ret) { if (ret) {
pr_warn("%s: failed to enable counter_32k module (%d)\n", pr_warn("%s: failed to enable counter_32k module (%d)\n",
...@@ -439,13 +427,18 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) ...@@ -439,13 +427,18 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
return ret; return ret;
} }
ret = omap_init_clocksource_32k(vbase); if (!of_have_populated_dt()) {
if (ret) { void __iomem *vbase;
pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
__func__, ret); vbase = omap_hwmod_get_mpu_rt_va(oh);
omap_hwmod_idle(oh);
}
ret = omap_init_clocksource_32k(vbase);
if (ret) {
pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
__func__, ret);
omap_hwmod_idle(oh);
}
}
return ret; return ret;
} }
...@@ -476,7 +469,64 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id, ...@@ -476,7 +469,64 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
clocksource_gpt.name, clksrc.rate); clocksource_gpt.name, clksrc.rate);
} }
#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
const char *clksrc_prop, bool gptimer)
{
omap_clk_init();
omap_dmtimer_init();
omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
/* Enable the use of clocksource="gp_timer" kernel parameter */
if (use_gptimer_clksrc || gptimer)
omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
clksrc_prop);
else
omap2_sync32k_clocksource_init();
}
void __init omap_init_time(void)
{
__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
2, "timer_sys_ck", NULL, false);
if (of_have_populated_dt())
clocksource_of_init();
}
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
void __init omap3_secure_sync32k_timer_init(void)
{
__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
2, "timer_sys_ck", NULL, false);
}
#endif /* CONFIG_ARCH_OMAP3 */
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
void __init omap3_gptimer_timer_init(void)
{
__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
1, "timer_sys_ck", "ti,timer-alwon", true);
}
#endif
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
static void __init omap4_sync32k_timer_init(void)
{
__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
2, "sys_clkin_ck", NULL, false);
}
void __init omap4_local_timer_init(void)
{
omap4_sync32k_timer_init();
clocksource_of_init();
}
#endif
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
/* /*
* The realtime counter also called master counter, is a free-running * The realtime counter also called master counter, is a free-running
* counter, which is related to real time. It produces the count used * counter, which is related to real time. It produces the count used
...@@ -488,6 +538,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id, ...@@ -488,6 +538,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
*/ */
static void __init realtime_counter_init(void) static void __init realtime_counter_init(void)
{ {
#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
void __iomem *base; void __iomem *base;
static struct clk *sys_clk; static struct clk *sys_clk;
unsigned long rate; unsigned long rate;
...@@ -586,78 +637,9 @@ static void __init realtime_counter_init(void) ...@@ -586,78 +637,9 @@ static void __init realtime_counter_init(void)
set_cntfreq(); set_cntfreq();
iounmap(base); iounmap(base);
}
#else
static inline void __init realtime_counter_init(void)
{}
#endif #endif
#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
clksrc_nr, clksrc_src, clksrc_prop) \
void __init omap##name##_gptimer_timer_init(void) \
{ \
omap_clk_init(); \
omap_dmtimer_init(); \
omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \
clksrc_prop); \
} }
#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
clksrc_nr, clksrc_src, clksrc_prop) \
void __init omap##name##_sync32k_timer_init(void) \
{ \
omap_clk_init(); \
omap_dmtimer_init(); \
omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
/* Enable the use of clocksource="gp_timer" kernel parameter */ \
if (use_gptimer_clksrc) \
omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \
clksrc_prop); \
else \
omap2_sync32k_clocksource_init(); \
}
#ifdef CONFIG_ARCH_OMAP2
OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
2, "timer_sys_ck", NULL);
#endif /* CONFIG_ARCH_OMAP2 */
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
2, "timer_sys_ck", NULL);
OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
2, "timer_sys_ck", NULL);
#endif /* CONFIG_ARCH_OMAP3 */
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \
defined(CONFIG_SOC_AM43XX)
OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
1, "timer_sys_ck", "ti,timer-alwon");
#endif
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
defined(CONFIG_SOC_DRA7XX)
static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
2, "sys_clkin_ck", NULL);
#endif
#ifdef CONFIG_ARCH_OMAP4
#ifdef CONFIG_HAVE_ARM_TWD
void __init omap4_local_timer_init(void)
{
omap4_sync32k_timer_init();
clocksource_of_init();
}
#else
void __init omap4_local_timer_init(void)
{
omap4_sync32k_timer_init();
}
#endif /* CONFIG_HAVE_ARM_TWD */
#endif /* CONFIG_ARCH_OMAP4 */
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
void __init omap5_realtime_timer_init(void) void __init omap5_realtime_timer_init(void)
{ {
omap4_sync32k_timer_init(); omap4_sync32k_timer_init();
......
...@@ -115,6 +115,13 @@ config CLKSRC_PISTACHIO ...@@ -115,6 +115,13 @@ config CLKSRC_PISTACHIO
bool bool
select CLKSRC_OF select CLKSRC_OF
config CLKSRC_TI_32K
bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
select CLKSRC_OF if OF
help
This option enables support for Texas Instruments 32.768 Hz clocksource
available on many OMAP-like platforms.
config CLKSRC_STM32 config CLKSRC_STM32
bool "Clocksource for STM32 SoCs" if !ARCH_STM32 bool "Clocksource for STM32 SoCs" if !ARCH_STM32
depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST) depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
......
...@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o ...@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
obj-$(CONFIG_MTK_TIMER) += mtk_timer.o obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
......
/**
* timer-ti-32k.c - OMAP2 32k Timer Support
*
* Copyright (C) 2009 Nokia Corporation
*
* Update to use new clocksource/clockevent layers
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
* Copyright (C) 2007 MontaVista Software, Inc.
*
* Original driver:
* Copyright (C) 2005 Nokia Corporation
* Author: Paul Mundt <paul.mundt@nokia.com>
* Juha Yrjölä <juha.yrjola@nokia.com>
* OMAP Dual-mode timer framework support by Timo Teras
*
* Some parts based off of TI's 24xx code:
*
* Copyright (C) 2004-2009 Texas Instruments, Inc.
*
* Roughly modelled after the OMAP1 MPU timer code.
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 of
* the License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/init.h>
#include <linux/time.h>
#include <linux/sched_clock.h>
#include <linux/clocksource.h>
#include <linux/of.h>
#include <linux/of_address.h>
/*
* 32KHz clocksource ... always available, on pretty most chips except
* OMAP 730 and 1510. Other timers could be used as clocksources, with
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
* but systems won't necessarily want to spend resources that way.
*/
#define OMAP2_32KSYNCNT_REV_OFF 0x0
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30
struct ti_32k {
void __iomem *base;
void __iomem *counter;
struct clocksource cs;
};
static inline struct ti_32k *to_ti_32k(struct clocksource *cs)
{
return container_of(cs, struct ti_32k, cs);
}
static cycle_t ti_32k_read_cycles(struct clocksource *cs)
{
struct ti_32k *ti = to_ti_32k(cs);
return (cycle_t)readl_relaxed(ti->counter);
}
static struct ti_32k ti_32k_timer = {
.cs = {
.name = "32k_counter",
.rating = 250,
.read = ti_32k_read_cycles,
.mask = CLOCKSOURCE_MASK(32),
.flags = CLOCK_SOURCE_IS_CONTINUOUS |
CLOCK_SOURCE_SUSPEND_NONSTOP,
},
};
static u64 notrace omap_32k_read_sched_clock(void)
{
return ti_32k_read_cycles(&ti_32k_timer.cs);
}
static void __init ti_32k_timer_init(struct device_node *np)
{
int ret;
ti_32k_timer.base = of_iomap(np, 0);
if (!ti_32k_timer.base) {
pr_err("Can't ioremap 32k timer base\n");
return;
}
ti_32k_timer.counter = ti_32k_timer.base;
/*
* 32k sync Counter IP register offsets vary between the highlander
* version and the legacy ones.
*
* The 'SCHEME' bits(30-31) of the revision register is used to identify
* the version.
*/
if (readl_relaxed(ti_32k_timer.base + OMAP2_32KSYNCNT_REV_OFF) &
OMAP2_32KSYNCNT_REV_SCHEME)
ti_32k_timer.counter += OMAP2_32KSYNCNT_CR_OFF_HIGH;
else
ti_32k_timer.counter += OMAP2_32KSYNCNT_CR_OFF_LOW;
ret = clocksource_register_hz(&ti_32k_timer.cs, 32768);
if (ret) {
pr_err("32k_counter: can't register clocksource\n");
return;
}
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
}
CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
ti_32k_timer_init);
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