Commit 3685f251 authored by Shawn Guo's avatar Shawn Guo Committed by Tejun Heo

ahci: imx: PLL clock needs 100us to settle down

The commit e783c51c (ahci: imx: software workaround for phy reset issue
in resume) calls imx_sata_phy_reset() to reset phy immediately after
SATA MPLL is enabled.  It seems working fine mostly, but fails in some
case as below.

...
ahci-imx 2200000.sata: failed to reset phy: -110
ahci-imx: probe of 2200000.sata failed with error -110

After talking to the designer, we learnt that when enabling i.MX6Q SATA
MPLL, we need to wait 100us for it to settle down for safety.  Add this
required delay to fix above failure.
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
Tested-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent 2af89a3c
...@@ -258,6 +258,8 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv) ...@@ -258,6 +258,8 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)
IMX6Q_GPR13_SATA_MPLL_CLK_EN, IMX6Q_GPR13_SATA_MPLL_CLK_EN,
IMX6Q_GPR13_SATA_MPLL_CLK_EN); IMX6Q_GPR13_SATA_MPLL_CLK_EN);
usleep_range(100, 200);
ret = imx_sata_phy_reset(hpriv); ret = imx_sata_phy_reset(hpriv);
if (ret) { if (ret) {
dev_err(dev, "failed to reset phy: %d\n", ret); dev_err(dev, "failed to reset phy: %d\n", ret);
......
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