Commit 36ce46ce authored by James Bottomley's avatar James Bottomley Committed by James Bottomley

Update qla2xxx to 8.00.00b9

From:         Andrew Vasquez <praka@users.sourceforge.net>
http://sourceforge.net/projects/linux-qla2xxx/
parent e5c7546b
......@@ -3,27 +3,21 @@ config SCSI_QLA2XXX_CONFIG
default (SCSI && PCI)
depends on SCSI && PCI
config SCSI_QLA2XXX
tristate
config SCSI_QLA21XX
tristate "Qlogic ISP2100 host adapter family support"
select SCSI_QLA2XXX
tristate "QLogic ISP2100 host adapter family support"
depends on SCSI_QLA2XXX_CONFIG
---help---
This driver supports the QLogic 21xx (ISP2100) host adapter family.
config SCSI_QLA22XX
tristate "Qlogic ISP2200 host adapter family support"
select SCSI_QLA2XXX
tristate "QLogic ISP2200 host adapter family support"
depends on SCSI_QLA2XXX_CONFIG
---help---
This driver supports the QLogic 22xx (ISP2200) host adapter family.
config SCSI_QLA23XX
tristate "Qlogic ISP23xx host adapter family support"
select SCSI_QLA2XXX
tristate "QLogic ISP23xx host adapter family support"
depends on SCSI_QLA2XXX_CONFIG
---help---
This driver supports the QLogic 23xx (ISP2300, ISP2312, and ISP2322)
host adapter family.
This driver supports the QLogic 23xx (ISP2300, ISP2312, ISP2322,
ISP6312 and ISP6322) host adapter family.
EXTRA_CFLAGS += -g -Idrivers/scsi -DUNIQUE_FW_NAME
EXTRA_CFLAGS += -Idrivers/scsi -DUNIQUE_FW_NAME
qla2xxx-y := qla_os.o qla_init.o qla_mbx.o qla_iocb.o qla_isr.o qla_gs.o \
qla_dbg.o qla_sup.o qla_rscn.o
qla2100-y := ql2100.o ql2100_fw.o
qla2200-y := ql2200.o ql2200_fw.o
qla2300-y := ql2300.o ql2300_fw.o #ql2322_fw.o
qla2300-y := ql2300.o ql2300_fw.o ql2322_fw.o ql6312_fw.o ql6322_fw.o
obj-$(CONFIG_SCSI_QLA21XX) += qla2xxx.o qla2100.o
obj-$(CONFIG_SCSI_QLA22XX) += qla2xxx.o qla2200.o
......
......@@ -15,80 +15,131 @@
static char qla_driver_name[] = "qla2300";
extern unsigned char fw2300tpx_version[];
extern unsigned char fw2300tpx_version_str[];
extern unsigned short fw2300tpx_addr01;
extern unsigned short fw2300tpx_code01[];
extern unsigned short fw2300tpx_length01;
extern unsigned char fw2322tpx_version[];
extern unsigned char fw2322tpx_version_str[];
extern unsigned short fw2322tpx_addr01;
extern unsigned short fw2322tpx_code01[];
extern unsigned short fw2322tpx_length01;
extern unsigned long rseqtpx_code_addr01;
extern unsigned short rseqtpx_code01[];
extern unsigned short rseqtpx_code_length01;
extern unsigned long xseqtpx_code_addr01;
extern unsigned short xseqtpx_code01[];
extern unsigned short xseqtpx_code_length01;
/* 2300/2310/2312 Firmware. */
extern unsigned char fw2300ipx_version[];
extern unsigned char fw2300ipx_version_str[];
extern unsigned short fw2300ipx_addr01;
extern unsigned short fw2300ipx_code01[];
extern unsigned short fw2300ipx_length01;
/* 2322 Firmware. */
extern unsigned char fw2322ipx_version[];
extern unsigned char fw2322ipx_version_str[];
extern unsigned short fw2322ipx_addr01;
extern unsigned short fw2322ipx_code01[];
extern unsigned short fw2322ipx_length01;
extern unsigned long rseqipx_code_addr01;
extern unsigned short rseqipx_code01[];
extern unsigned short rseqipx_code_length01;
extern unsigned long xseqipx_code_addr01;
extern unsigned short xseqipx_code01[];
extern unsigned short xseqipx_code_length01;
/* 6312 Firmware. */
extern unsigned char fw2300flx_version[];
extern unsigned char fw2300flx_version_str[];
extern unsigned short fw2300flx_addr01;
extern unsigned short fw2300flx_code01[];
extern unsigned short fw2300flx_length01;
/* 6322 Firmware. */
extern unsigned char fw2322flx_version[];
extern unsigned char fw2322flx_version_str[];
extern unsigned short fw2322flx_addr01;
extern unsigned short fw2322flx_code01[];
extern unsigned short fw2322flx_length01;
extern unsigned long rseqflx_code_addr01;
extern unsigned short rseqflx_code01[];
extern unsigned short rseqflx_code_length01;
extern unsigned long xseqflx_code_addr01;
extern unsigned short xseqflx_code01[];
extern unsigned short xseqflx_code_length01;
static struct qla_fw_info qla_fw_tbl[] = {
/* Start of 23xx firmware list */
{
.addressing = FW_INFO_ADDR_NORMAL,
.fwcode = &fw2300tpx_code01[0],
.fwlen = &fw2300tpx_length01,
.fwstart = &fw2300tpx_addr01,
.fwcode = &fw2300ipx_code01[0],
.fwlen = &fw2300ipx_length01,
.fwstart = &fw2300ipx_addr01,
},
#if defined(ISP2322)
/* End of 23xx firmware list */
{ FW_INFO_ADDR_NOMORE, },
/* Start of 232x firmware list */
{
.addressing = FW_INFO_ADDR_NORMAL,
.fwcode = &fw2322tpx_code01[0],
.fwlen = &fw2322tpx_length01,
.fwstart = &fw2322tpx_addr01,
.fwcode = &fw2322ipx_code01[0],
.fwlen = &fw2322ipx_length01,
.fwstart = &fw2322ipx_addr01,
},
{
.addressing = FW_INFO_ADDR_EXTENDED,
.fwcode = &rseqtpx_code01[0],
.fwlen = &rseqtpx_code_length01,
.lfwstart = &rseqtpx_code_addr01,
.fwcode = &rseqipx_code01[0],
.fwlen = &rseqipx_code_length01,
.lfwstart = &rseqipx_code_addr01,
},
{
.addressing = FW_INFO_ADDR_EXTENDED,
.fwcode = &xseqtpx_code01[0],
.fwlen = &xseqtpx_code_length01,
.lfwstart = &xseqtpx_code_addr01,
.fwcode = &xseqipx_code01[0],
.fwlen = &xseqipx_code_length01,
.lfwstart = &xseqipx_code_addr01,
},
{ FW_INFO_ADDR_NOMORE, },
/* Start of 631x firmware list */
{
.addressing = FW_INFO_ADDR_NORMAL,
.fwcode = &fw2300flx_code01[0],
.fwlen = &fw2300flx_length01,
.fwstart = &fw2300flx_addr01,
},
{ FW_INFO_ADDR_NOMORE, },
/* Start of 632x firmware list */
{
.addressing = FW_INFO_ADDR_NORMAL,
.fwcode = &fw2322flx_code01[0],
.fwlen = &fw2322flx_length01,
.fwstart = &fw2322flx_addr01,
},
{
.addressing = FW_INFO_ADDR_EXTENDED,
.fwcode = &rseqflx_code01[0],
.fwlen = &rseqflx_code_length01,
.lfwstart = &rseqflx_code_addr01,
},
{
.addressing = FW_INFO_ADDR_EXTENDED,
.fwcode = &xseqflx_code01[0],
.fwlen = &xseqflx_code_length01,
.lfwstart = &xseqflx_code_addr01,
},
#endif
{ FW_INFO_ADDR_NOMORE, },
};
static struct qla_board_info qla_board_tbl[] = {
{
.drv_name = qla_driver_name,
.isp_name = "ISP2300",
.fw_info = qla_fw_tbl,
},
{
.drv_name = qla_driver_name,
.isp_name = "ISP2312",
.fw_info = qla_fw_tbl,
},
#if defined(ISP2322)
{
.drv_name = qla_driver_name,
.isp_name = "ISP2322",
.fw_info = &qla_fw_tbl[2],
},
#endif
{
.drv_name = qla_driver_name,
.isp_name = "ISP6312",
.fw_info = &qla_fw_tbl[6],
},
{
.drv_name = qla_driver_name,
.isp_name = "ISP6322",
.fw_info = &qla_fw_tbl[8],
},
};
static struct pci_device_id qla2300_pci_tbl[] = {
......@@ -99,7 +150,6 @@ static struct pci_device_id qla2300_pci_tbl[] = {
.subdevice = PCI_ANY_ID,
.driver_data = (unsigned long)&qla_board_tbl[0],
},
{
.vendor = PCI_VENDOR_ID_QLOGIC,
.device = PCI_DEVICE_ID_QLOGIC_ISP2312,
......@@ -107,8 +157,6 @@ static struct pci_device_id qla2300_pci_tbl[] = {
.subdevice = PCI_ANY_ID,
.driver_data = (unsigned long)&qla_board_tbl[1],
},
#if defined(ISP2322)
{
.vendor = PCI_VENDOR_ID_QLOGIC,
.device = PCI_DEVICE_ID_QLOGIC_ISP2322,
......@@ -116,7 +164,20 @@ static struct pci_device_id qla2300_pci_tbl[] = {
.subdevice = PCI_ANY_ID,
.driver_data = (unsigned long)&qla_board_tbl[2],
},
#endif
{
.vendor = PCI_VENDOR_ID_QLOGIC,
.device = PCI_DEVICE_ID_QLOGIC_ISP6312,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.driver_data = (unsigned long)&qla_board_tbl[3],
},
{
.vendor = PCI_VENDOR_ID_QLOGIC,
.device = PCI_DEVICE_ID_QLOGIC_ISP6322,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.driver_data = (unsigned long)&qla_board_tbl[4],
},
{0, 0},
};
MODULE_DEVICE_TABLE(pci, qla2300_pci_tbl);
......
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......@@ -73,7 +73,7 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
/* Pause RISC. */
WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
if (!IS_QLA2312(ha) && !IS_QLA2322(ha)) {
if (IS_QLA2300(ha)) {
for (cnt = 30000;
(RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
rval == QLA_SUCCESS; cnt--) {
......@@ -180,7 +180,7 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
}
}
if (IS_QLA2312(ha) || IS_QLA2322(ha)) {
if (!IS_QLA2300(ha)) {
for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 &&
rval == QLA_SUCCESS; cnt--) {
if (cnt)
......@@ -1070,18 +1070,6 @@ qla2x00_print_scsi_cmd(struct scsi_cmnd * cmd)
sp->lun_queue->fclun->fcport->cur_path);
}
/*
* qla2x00_print_q_info
* Prints queue info
* Input
* q: lun queue
*/
void
qla2x00_print_q_info(struct os_lun *q)
{
printk("Queue info: flags=0x%lx\n", q->q_flag);
}
#if defined(QL_DEBUG_ROUTINES)
/*
* qla2x00_formatted_dump_buffer
......@@ -1163,67 +1151,4 @@ qla2x00_formatted_dump_buffer(char *string, uint8_t * buffer,
break;
}
}
#endif
#if STOP_ON_ERROR
/**************************************************************************
* qla2x00_panic
*
**************************************************************************/
static void
qla2x00_panic(char *cp, struct Scsi_Host *host)
{
struct scsi_qla_host *ha;
long *fp;
ha = (struct scsi_qla_host *) host->hostdata;
DEBUG2(ql2x_debug_print = 1;);
printk("qla2100 - PANIC: %s\n", cp);
printk("Current time=0x%lx\n", jiffies);
printk("Number of pending commands =0x%lx\n", ha->actthreads);
printk("Number of queued commands =0x%lx\n", ha->qthreads);
printk("Number of free entries = (%d)\n", ha->req_q_cnt);
printk("Request Queue @ 0x%lx, Response Queue @ 0x%lx\n",
ha->request_dma, ha->response_dma);
printk("Request In Ptr %d\n", ha->req_ring_index);
fp = (long *) &ha->flags;
printk("HA flags =0x%lx\n", *fp);
qla2x00_dump_requests(ha);
qla2x00_dump_regs(ha);
cli();
for (;;) {
udelay(2);
barrier();
/* cpu_relax();*/
}
sti();
}
#endif
/**************************************************************************
* qla2x00_dump_requests
*
**************************************************************************/
void
qla2x00_dump_requests(scsi_qla_host_t *ha)
{
struct scsi_cmnd *cp;
srb_t *sp;
int i;
printk("Outstanding Commands on controller:\n");
for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
if ((sp = ha->outstanding_cmds[i]) == NULL)
continue;
if ((cp = sp->cmd) == NULL)
continue;
printk("(%d): Pid=%ld, sp flags=0x%x, cmd=0x%p\n",
i, sp->cmd->serial_number, sp->flags, CMD_SP(sp->cmd));
}
}
......@@ -17,55 +17,6 @@
*
******************************************************************************/
/*
* Firmware Dump structure definition
*/
#define FW_DUMP_SIZE 0xBC000 /* bytes */
struct qla2300_fw_dump {
uint16_t hccr;
uint16_t pbiu_reg[8];
uint16_t risc_host_reg[8];
uint16_t mailbox_reg[32];
uint16_t resp_dma_reg[32];
uint16_t dma_reg[48];
uint16_t risc_hdw_reg[16];
uint16_t risc_gp0_reg[16];
uint16_t risc_gp1_reg[16];
uint16_t risc_gp2_reg[16];
uint16_t risc_gp3_reg[16];
uint16_t risc_gp4_reg[16];
uint16_t risc_gp5_reg[16];
uint16_t risc_gp6_reg[16];
uint16_t risc_gp7_reg[16];
uint16_t frame_buf_hdw_reg[64];
uint16_t fpm_b0_reg[64];
uint16_t fpm_b1_reg[64];
uint16_t risc_ram[0xf800];
uint16_t stack_ram[0x1000];
uint16_t data_ram[0xF000];
};
struct qla2100_fw_dump {
uint16_t hccr;
uint16_t pbiu_reg[8];
uint16_t mailbox_reg[32];
uint16_t dma_reg[48];
uint16_t risc_hdw_reg[16];
uint16_t risc_gp0_reg[16];
uint16_t risc_gp1_reg[16];
uint16_t risc_gp2_reg[16];
uint16_t risc_gp3_reg[16];
uint16_t risc_gp4_reg[16];
uint16_t risc_gp5_reg[16];
uint16_t risc_gp6_reg[16];
uint16_t risc_gp7_reg[16];
uint16_t frame_buf_hdw_reg[16];
uint16_t fpm_b0_reg[64];
uint16_t fpm_b1_reg[64];
uint16_t risc_ram[0xf000];
};
/*
* Driver debug definitions.
*/
......@@ -227,3 +178,54 @@ struct qla2100_fw_dump {
#else
#define DEBUG14(x) do {} while (0)
#endif
/*
* Firmware Dump structure definition
*/
#define FW_DUMP_SIZE 0xBC000 /* bytes */
struct qla2300_fw_dump {
uint16_t hccr;
uint16_t pbiu_reg[8];
uint16_t risc_host_reg[8];
uint16_t mailbox_reg[32];
uint16_t resp_dma_reg[32];
uint16_t dma_reg[48];
uint16_t risc_hdw_reg[16];
uint16_t risc_gp0_reg[16];
uint16_t risc_gp1_reg[16];
uint16_t risc_gp2_reg[16];
uint16_t risc_gp3_reg[16];
uint16_t risc_gp4_reg[16];
uint16_t risc_gp5_reg[16];
uint16_t risc_gp6_reg[16];
uint16_t risc_gp7_reg[16];
uint16_t frame_buf_hdw_reg[64];
uint16_t fpm_b0_reg[64];
uint16_t fpm_b1_reg[64];
uint16_t risc_ram[0xf800];
uint16_t stack_ram[0x1000];
uint16_t data_ram[0xF000];
};
struct qla2100_fw_dump {
uint16_t hccr;
uint16_t pbiu_reg[8];
uint16_t mailbox_reg[32];
uint16_t dma_reg[48];
uint16_t risc_hdw_reg[16];
uint16_t risc_gp0_reg[16];
uint16_t risc_gp1_reg[16];
uint16_t risc_gp2_reg[16];
uint16_t risc_gp3_reg[16];
uint16_t risc_gp4_reg[16];
uint16_t risc_gp5_reg[16];
uint16_t risc_gp6_reg[16];
uint16_t risc_gp7_reg[16];
uint16_t frame_buf_hdw_reg[16];
uint16_t fpm_b0_reg[64];
uint16_t fpm_b1_reg[64];
uint16_t risc_ram[0xf000];
};
......@@ -33,6 +33,14 @@
#define PCI_DEVICE_ID_QLOGIC_ISP2322 0x2322
#endif
#ifndef PCI_DEVICE_ID_QLOGIC_ISP6312
#define PCI_DEVICE_ID_QLOGIC_ISP6312 0x6312
#endif
#ifndef PCI_DEVICE_ID_QLOGIC_ISP6322
#define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322
#endif
#if defined(CONFIG_SCSI_QLA21XX) || defined(CONFIG_SCSI_QLA21XX_MODULE)
#define IS_QLA2100(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2100)
#else
......@@ -49,18 +57,23 @@
#define IS_QLA2300(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2300)
#define IS_QLA2312(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2312)
#define IS_QLA2322(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2322)
#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha))
#define IS_QLA6312(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP6312)
#define IS_QLA6322(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP6322)
#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \
IS_QLA6312(ha) || IS_QLA6322(ha))
#else
#define IS_QLA2300(ha) 0
#define IS_QLA2312(ha) 0
#define IS_QLA2322(ha) 0
#define IS_QLA6312(ha) 0
#define IS_QLA6322(ha) 0
#define IS_QLA23XX(ha) 0
#endif
/*
* Only ISP23XX has extended addressing support in the firmware.
* Only non-ISP2[12]00 have extended addressing support in the firmware.
*/
#define HAS_EXTENDED_IDS(ha) IS_QLA23XX(ha)
#define HAS_EXTENDED_IDS(ha) (!IS_QLA2100(ha) && !IS_QLA2200(ha))
/*
* We have MAILBOX_REGISTER_COUNT sized arrays in a few places,
......@@ -126,21 +139,12 @@
* I/O register
*/
#if MEMORY_MAPPED_IO
#define RD_REG_BYTE(addr) readb(addr)
#define RD_REG_WORD(addr) readw(addr)
#define RD_REG_DWORD(addr) readl(addr)
#define WRT_REG_BYTE(addr, data) writeb(data,addr)
#define WRT_REG_WORD(addr, data) writew(data,addr)
#define WRT_REG_DWORD(addr, data) writel(data,addr)
#else /* MEMORY_MAPPED_IO */
#define RD_REG_BYTE(addr) (inb((unsigned long)addr))
#define RD_REG_WORD(addr) (inw((unsigned long)addr))
#define RD_REG_DWORD(addr) (inl((unsigned long)addr))
#define WRT_REG_BYTE(addr, data) (outb(data,(unsigned long)addr))
#define WRT_REG_WORD(addr, data) (outw(data,(unsigned long)addr))
#define WRT_REG_DWORD(addr, data) (outl(data,(unsigned long)addr))
#endif /* MEMORY_MAPPED_IO */
/*
* Fibre Channel device definitions.
......@@ -433,42 +437,43 @@ typedef volatile struct {
} u_end;
} device_reg_t;
#define ISP_REQ_Q_IN(ha, reg) \
(IS_QLA23XX(ha) ? \
&(reg)->u.isp2300.req_q_in : \
&(reg)->u.isp2100.mailbox4)
#define ISP_REQ_Q_OUT(ha, reg) \
(IS_QLA23XX(ha) ? \
&(reg)->u.isp2300.req_q_out : \
&(reg)->u.isp2100.mailbox4)
#define ISP_RSP_Q_IN(ha, reg) \
(IS_QLA23XX(ha) ? \
&(reg)->u.isp2300.rsp_q_in : \
&(reg)->u.isp2100.mailbox5)
#define ISP_RSP_Q_OUT(ha, reg) \
(IS_QLA23XX(ha) ? \
&(reg)->u.isp2300.rsp_q_out : \
&(reg)->u.isp2100.mailbox5)
#define ISP_REQ_Q_IN(ha, reg) \
(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
&(reg)->u.isp2100.mailbox4 : \
&(reg)->u.isp2300.req_q_in)
#define ISP_REQ_Q_OUT(ha, reg) \
(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
&(reg)->u.isp2100.mailbox4 : \
&(reg)->u.isp2300.req_q_out)
#define ISP_RSP_Q_IN(ha, reg) \
(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
&(reg)->u.isp2100.mailbox5 : \
&(reg)->u.isp2300.rsp_q_in)
#define ISP_RSP_Q_OUT(ha, reg) \
(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
&(reg)->u.isp2100.mailbox5 : \
&(reg)->u.isp2300.rsp_q_out)
#define MAILBOX_REG(ha, reg, num) \
(IS_QLA23XX(ha) ? \
&(reg)->u.isp2300.mailbox0 + (num) : \
((num < 8) ? \
(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
(num < 8 ? \
&(reg)->u.isp2100.mailbox0 + (num) : \
&(reg)->u_end.isp2200.mailbox8 + (num) - 8)) /* only for isp2200 */
&(reg)->u_end.isp2200.mailbox8 + (num) - 8) : \
&(reg)->u.isp2300.mailbox0 + (num))
#define RD_MAILBOX_REG(ha, reg, num) \
RD_REG_WORD(MAILBOX_REG(ha, reg, num))
#define WRT_MAILBOX_REG(ha, reg, num, data) \
WRT_REG_WORD(MAILBOX_REG(ha, reg, num), data)
#define FB_CMD_REG(ha, reg) \
(IS_QLA23XX(ha) ? &(reg)->u.isp2300.fb_cmd : &(reg)->fb_cmd_2100)
(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
&(reg)->fb_cmd_2100 : \
&(reg)->u.isp2300.fb_cmd)
#define RD_FB_CMD_REG(ha, reg) \
RD_REG_WORD(FB_CMD_REG(ha, reg))
#define WRT_FB_CMD_REG(ha, reg, data) \
WRT_REG_WORD(FB_CMD_REG(ha, reg), data)
typedef struct {
uint32_t out_mb; /* outbound from driver */
uint32_t in_mb; /* Incoming from RISC */
......@@ -716,8 +721,8 @@ typedef struct {
uint8_t hard_address;
uint8_t reserved_1;
uint8_t port_id[4];
uint8_t node_name[WWN_SIZE]; /* Big endian. */
uint8_t port_name[WWN_SIZE]; /* Big endian. */
uint8_t node_name[WWN_SIZE];
uint8_t port_name[WWN_SIZE];
uint16_t execution_throttle;
uint16_t execution_count;
uint8_t reset_count;
......@@ -1919,12 +1924,6 @@ struct io_descriptor {
uint32_t signature;
};
/* Mailbox command semaphore queue for command serialization */
typedef struct _mbx_cmdq_t {
struct semaphore cmd_sem;
struct _mbx_cmdq_t *pnext;
} mbx_cmdq_t;
struct qla_fw_info {
unsigned short addressing; /* addressing method used to load fw */
#define FW_INFO_ADDR_NORMAL 0
......@@ -2102,6 +2101,8 @@ typedef struct scsi_qla_host {
uint16_t max_public_loop_ids;
uint16_t min_external_loopid; /* First external loop Id */
uint16_t link_data_rate; /* F/W operating speed */
uint8_t current_topology;
uint8_t prev_topology;
#define ISP_CFG_NL 1
......@@ -2115,9 +2116,6 @@ typedef struct scsi_qla_host {
#define LOOP_P2P 2
#define P2P_LOOP 3
uint8_t active_fc4_types; /* Active fc4 types */
uint8_t current_speed; /* F/W operating speed */
uint8_t marker_needed;
uint8_t sns_retry_cnt;
uint8_t mem_err;
......@@ -2194,26 +2192,13 @@ typedef struct scsi_qla_host {
mbx_cmd_t *mcp;
unsigned long mbx_cmd_flags;
#define MBX_CMD_ACTIVE 1
#define MBX_CMD_WANT 2
#define MBX_INTERRUPT 3
#define MBX_INTR_WAIT 4
#define MBX_INTERRUPT 1
#define MBX_INTR_WAIT 2
spinlock_t mbx_reg_lock; /* Mbx Cmd Register Lock */
spinlock_t mbx_q_lock; /* Mbx Active Cmd Queue Lock */
spinlock_t mbx_bits_lock; /* Mailbox access bits Lock */
struct semaphore mbx_intr_sem; /* Used for completion notification */
mbx_cmdq_t *mbx_sem_pool_head; /* Head Pointer to a list of
* recyclable mbx semaphore pool
* to be used during run time.
*/
mbx_cmdq_t *mbx_sem_pool_tail; /* Tail Pointer to semaphore pool*/
#define MBQ_INIT_LEN 16 /* initial mbx sem pool q len. actual len may vary */
mbx_cmdq_t *mbx_q_head; /* Head Pointer to sem q for active cmds */
mbx_cmdq_t *mbx_q_tail; /* Tail Pointer to sem q for active cmds */
struct semaphore mbx_cmd_sem; /* Serialialize mbx access */
struct semaphore mbx_intr_sem; /* Used for completion notification */
uint32_t mbx_flags;
#define MBX_IN_PROGRESS BIT_0
......@@ -2257,21 +2242,14 @@ typedef struct scsi_qla_host {
uint8_t host_str[16];
uint16_t pci_attr;
uint16_t xchg_buf_cnt;
uint16_t iocb_buf_cnt;
uint8_t model_number[16+1];
uint16_t product_id[4];
uint8_t model_number[16+1];
#define BINZERO "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"
char *model_desc;
char *model_desc;
/* following are new and needed for IOCTL support */
#ifdef CONFIG_SCSI_QLA2XXX_IOCTL
struct hba_ioctl *ioctl;
void *ioctl_mem;
dma_addr_t ioctl_mem_phys;
uint32_t ioctl_mem_size;
#endif
uint8_t node_name[WWN_SIZE];
uint8_t nvram_version;
uint8_t optrom_major;
......
......@@ -103,6 +103,8 @@ extern void qla2x00_abort_queues(scsi_qla_host_t *, uint8_t);
extern void qla2x00_blink_led(scsi_qla_host_t *);
extern int qla2x00_down_timeout(struct semaphore *, unsigned long);
/*
* Global Function Prototypes in qla_iocb.c source file.
*/
......@@ -217,11 +219,6 @@ qla2x00_full_login_lip(scsi_qla_host_t *ha);
extern int
qla2x00_get_id_list(scsi_qla_host_t *, void *, dma_addr_t, uint16_t *);
#if 0 /* not yet needed */
extern int
qla2x00_dump_ram(scsi_qla_host_t *, uint32_t, dma_addr_t, uint32_t);
#endif
extern int
qla2x00_lun_reset(scsi_qla_host_t *, uint16_t, uint16_t);
......@@ -239,10 +236,8 @@ extern int
qla2x00_get_resource_cnts(scsi_qla_host_t *, uint16_t *, uint16_t *, uint16_t *,
uint16_t *);
#if defined(QL_DEBUG_LEVEL_3)
extern int
qla2x00_get_fcal_position_map(scsi_qla_host_t *ha, char *pos_map);
#endif
/*
* Global Function Prototypes in qla_isr.c source file.
......@@ -275,17 +270,6 @@ extern void qla2300_ascii_fw_dump(scsi_qla_host_t *);
extern void qla2x00_dump_regs(scsi_qla_host_t *);
extern void qla2x00_dump_buffer(uint8_t *, uint32_t);
extern void qla2x00_print_scsi_cmd(struct scsi_cmnd *);
extern void qla2x00_print_q_info(struct os_lun *);
/*
* Global Function Prototypes in qla_ip.c source file.
*/
extern int qla2x00_ip_initialize(scsi_qla_host_t *);
extern int qla2x00_update_ip_device_data(scsi_qla_host_t *, fc_port_t *);
extern void qla2x00_ip_send_complete(scsi_qla_host_t *, uint32_t, uint16_t);
extern void qla2x00_ip_receive(scsi_qla_host_t *, sts_entry_t *);
extern void qla2x00_ip_receive_fastpost(scsi_qla_host_t *, uint16_t);
extern void qla2x00_ip_mailbox_iocb_done(scsi_qla_host_t *, struct mbx_entry *);
/*
* Global Function Prototypes in qla_gs.c source file.
......
......@@ -20,11 +20,6 @@
#include "qla_def.h"
/* XXX(hch): this is ugly, but we don't want to pull in exioctl.h */
#ifndef EXT_DEF_FC4_TYPE_SCSI
#define EXT_DEF_FC4_TYPE_SCSI 0x1
#endif
static inline ms_iocb_entry_t *
qla2x00_prep_ms_iocb(scsi_qla_host_t *, uint32_t, uint32_t);
......@@ -235,7 +230,7 @@ qla2x00_gid_pt(scsi_qla_host_t *ha, sw_info_t *list)
/*
* If we've used all available slots, then the switch is
* reporting back more devices that we can handle with this
* reporting back more devices than we can handle with this
* single call. Return a failed status, and let GA_NXT handle
* the overload.
*/
......@@ -477,7 +472,6 @@ qla2x00_rft_id(scsi_qla_host_t *ha)
ct_req->req.rft_id.port_id[2] = ha->d_id.b.al_pa;
ct_req->req.rft_id.fc4_types[2] = 0x01; /* FCP-3 */
ha->active_fc4_types = EXT_DEF_FC4_TYPE_SCSI;
/* Execute MS IOCB */
rval = qla2x00_issue_iocb(ha, ha->ms_iocb, ha->ms_iocb_dma,
......
This diff is collapsed.
......@@ -527,8 +527,6 @@ __qla2x00_marker(scsi_qla_host_t *ha, uint16_t loop_id, uint16_t lun,
{
mrk_entry_t *pkt;
ENTER(__func__);
pkt = (mrk_entry_t *)qla2x00_req_pkt(ha);
if (pkt == NULL) {
DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
......@@ -547,8 +545,6 @@ __qla2x00_marker(scsi_qla_host_t *ha, uint16_t loop_id, uint16_t lun,
/* Issue command to ISP */
qla2x00_isp_cmd(ha);
LEAVE(__func__);
return (QLA_SUCCESS);
}
......@@ -584,8 +580,6 @@ qla2x00_req_pkt(scsi_qla_host_t *ha)
uint32_t timer;
uint16_t req_cnt = 1;
ENTER(__func__);
/* Wait 1 second for slot. */
for (timer = HZ; timer; timer--) {
if ((req_cnt + 2) >= ha->req_q_cnt) {
......@@ -632,8 +626,6 @@ qla2x00_req_pkt(scsi_qla_host_t *ha)
DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
}
LEAVE(__func__);
return (pkt);
}
......@@ -658,8 +650,6 @@ qla2x00_ms_req_pkt(scsi_qla_host_t *ha, srb_t *sp)
uint8_t found = 0;
uint16_t req_cnt = 1;
ENTER(__func__);
/* Wait 1 second for slot. */
for (timer = HZ; timer; timer--) {
if ((req_cnt + 2) >= ha->req_q_cnt) {
......@@ -730,8 +720,6 @@ qla2x00_ms_req_pkt(scsi_qla_host_t *ha, srb_t *sp)
DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
}
LEAVE(__func__);
return (pkt);
}
......
......@@ -21,12 +21,6 @@
#include "qla_def.h"
/* XXX(hch): this is ugly, but we don't want to pull in exioctl.h */
#ifndef EXT_DEF_PORTSPEED_1GBIT
#define EXT_DEF_PORTSPEED_1GBIT 1
#define EXT_DEF_PORTSPEED_2GBIT 2
#endif
static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
static void qla2x00_async_event(scsi_qla_host_t *, uint32_t);
static void qla2x00_process_completed_request(struct scsi_qla_host *, uint32_t);
......@@ -424,15 +418,14 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint32_t mbx)
case MBA_LOOP_UP: /* Loop Up Event */
mb[1] = RD_MAILBOX_REG(ha, reg, 1);
ha->current_speed = EXT_DEF_PORTSPEED_1GBIT;
ha->link_data_rate = 0;
if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
link_speed = link_speeds[0];
} else {
link_speed = link_speeds[3];
if (mb[1] < 5)
link_speed = link_speeds[mb[1]];
if (mb[1] == 1)
ha->current_speed = EXT_DEF_PORTSPEED_2GBIT;
ha->link_data_rate = mb[1];
}
DEBUG2(printk("scsi(%ld): Asynchronous LOOP UP (%s Gbps).\n",
......@@ -458,7 +451,7 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint32_t mbx)
}
ha->flags.management_server_logged_in = 0;
ha->current_speed = 0; /* reset value */
ha->link_data_rate = 0;
/* Update AEN queue. */
qla2x00_enqueue_aen(ha, MBA_LOOP_DOWN, NULL);
......@@ -547,7 +540,8 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint32_t mbx)
* us, create a new entry in our rscn fcports list and handle
* the event like an RSCN.
*/
if (IS_QLA23XX(ha) && ha->flags.init_done && mb[1] != 0xffff &&
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) &&
ha->flags.init_done && mb[1] != 0xffff &&
((ha->operating_mode == P2P && mb[1] != 0) ||
(ha->operating_mode != P2P && mb[1] !=
SNS_FIRST_LOOP_ID)) && (mb[2] == 6 || mb[2] == 7)) {
......@@ -775,7 +769,7 @@ qla2x00_process_response_queue(struct scsi_qla_host *ha)
qla2x00_ms_entry(ha, (ms_iocb_entry_t *)pkt);
break;
case MBX_IOCB_TYPE:
if (IS_QLA23XX(ha)) {
if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) {
if (pkt->sys_define == SOURCE_ASYNC_IOCB) {
qla2x00_process_iodesc(ha,
(struct mbx_entry *)pkt);
......
This diff is collapsed.
This diff is collapsed.
......@@ -22,8 +22,6 @@
*/
#define DEBUG_QLA2100 0 /* For Debug of qla2x00 */
#define MEMORY_MAPPED_IO 1
#define STOP_ON_ERROR 0 /* Stop on aborts and resets */
#define STOP_ON_RESET 0
#define USE_ABORT_TGT 1 /* Use Abort Target mbx cmd */
......
......@@ -55,7 +55,7 @@ qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
reg = ha->iobase;
if (IS_QLA2312(ha) || IS_QLA2322(ha)) {
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) {
data = RD_REG_WORD(&reg->nvram);
while (data & NVR_BUSY) {
udelay(100);
......@@ -87,7 +87,7 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
reg = ha->iobase;
if (IS_QLA2312(ha) || IS_QLA2322(ha))
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
WRT_REG_WORD(&reg->u.isp2300.host_semaphore, 0);
}
......@@ -296,6 +296,7 @@ qla2x00_flash_enable(scsi_qla_host_t *ha)
data = RD_REG_WORD(&reg->ctrl_status);
data |= CSR_FLASH_ENABLE;
WRT_REG_WORD(&reg->ctrl_status, data);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
}
/**
......@@ -311,6 +312,7 @@ qla2x00_flash_disable(scsi_qla_host_t *ha)
data = RD_REG_WORD(&reg->ctrl_status);
data &= ~(CSR_FLASH_ENABLE);
WRT_REG_WORD(&reg->ctrl_status, data);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
}
/**
......@@ -334,13 +336,30 @@ qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr)
if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
bank_select |= CSR_FLASH_64K_BANK;
WRT_REG_WORD(&reg->ctrl_status, bank_select);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
} else if (((addr & BIT_16) == 0) &&
(bank_select & CSR_FLASH_64K_BANK)) {
bank_select &= ~(CSR_FLASH_64K_BANK);
WRT_REG_WORD(&reg->ctrl_status, bank_select);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
}
/* The ISP2312 v2 chip cannot access the FLASH registers via MMIO. */
if (IS_QLA2312(ha) && ha->product_id[3] == 0x2 && ha->pio_address) {
uint16_t data2;
reg = (device_reg_t *)ha->pio_address;
outw((uint16_t)addr, (unsigned long)(&reg->flash_address));
do {
data = inw((unsigned long)(&reg->flash_data));
barrier();
cpu_relax();
data2 = inw((unsigned long)(&reg->flash_data));
} while (data != data2);
} else {
WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
data = qla2x00_debounce_register(&reg->flash_data);
}
WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
data = qla2x00_debounce_register(&reg->flash_data);
return ((uint8_t)data);
}
......@@ -362,13 +381,25 @@ qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data)
if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
bank_select |= CSR_FLASH_64K_BANK;
WRT_REG_WORD(&reg->ctrl_status, bank_select);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
} else if (((addr & BIT_16) == 0) &&
(bank_select & CSR_FLASH_64K_BANK)) {
bank_select &= ~(CSR_FLASH_64K_BANK);
WRT_REG_WORD(&reg->ctrl_status, bank_select);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
}
/* The ISP2312 v2 chip cannot access the FLASH registers via MMIO. */
if (IS_QLA2312(ha) && ha->product_id[3] == 0x2 && ha->pio_address) {
reg = (device_reg_t *)ha->pio_address;
outw((uint16_t)addr, (unsigned long)(&reg->flash_address));
outw((uint16_t)data, (unsigned long)(&reg->flash_data));
} else {
WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
WRT_REG_WORD(&reg->flash_data, (uint16_t)data);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
}
WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
WRT_REG_WORD(&reg->flash_data, (uint16_t)data);
}
/**
......@@ -504,7 +535,9 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha)
uint32_t loop_cnt = 1; /* this is for error exit only */
uint32_t pcir_adr;
ENTER(__func__);
/* The ISP2312 v2 chip cannot access the FLASH registers via MMIO. */
if (IS_QLA2312(ha) && ha->product_id[3] == 0x2 && !ha->pio_address)
ret = QLA_FUNCTION_FAILED;
qla2x00_flash_enable(ha);
do { /* Loop once to provide quick error exit */
......@@ -545,8 +578,6 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha)
} while (--loop_cnt);
qla2x00_flash_disable(ha);
LEAVE(__func__);
return (ret);
}
......@@ -569,6 +600,7 @@ qla2x00_get_flash_image(scsi_qla_host_t *ha, uint8_t *image)
qla2x00_flash_enable(ha);
WRT_REG_WORD(&reg->nvram, 0);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */
for (addr = 0, data = image; addr < FLASH_IMAGE_SIZE; addr++, data++) {
if (addr == midpoint)
WRT_REG_WORD(&reg->nvram, NVR_SELECT);
......@@ -605,6 +637,7 @@ qla2x00_set_flash_image(scsi_qla_host_t *ha, uint8_t *image)
/* Reset ISP chip. */
WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
qla2x00_flash_enable(ha);
do { /* Loop once to provide quick error exit */
......
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