Commit 379ef82d authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: Enable CRC interrupts on pre-gen5/vlv

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 4356d586
...@@ -2574,7 +2574,8 @@ static int valleyview_irq_postinstall(struct drm_device *dev) ...@@ -2574,7 +2574,8 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
{ {
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
u32 enable_mask; u32 enable_mask;
u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV; u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV |
PIPE_CRC_DONE_ENABLE;
unsigned long irqflags; unsigned long irqflags;
enable_mask = I915_DISPLAY_PORT_INTERRUPT; enable_mask = I915_DISPLAY_PORT_INTERRUPT;
...@@ -2697,6 +2698,7 @@ static void i8xx_irq_preinstall(struct drm_device * dev) ...@@ -2697,6 +2698,7 @@ static void i8xx_irq_preinstall(struct drm_device * dev)
static int i8xx_irq_postinstall(struct drm_device *dev) static int i8xx_irq_postinstall(struct drm_device *dev)
{ {
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
unsigned long irqflags;
I915_WRITE16(EMR, I915_WRITE16(EMR,
~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH)); ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH));
...@@ -2717,6 +2719,13 @@ static int i8xx_irq_postinstall(struct drm_device *dev) ...@@ -2717,6 +2719,13 @@ static int i8xx_irq_postinstall(struct drm_device *dev)
I915_USER_INTERRUPT); I915_USER_INTERRUPT);
POSTING_READ16(IER); POSTING_READ16(IER);
/* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy. */
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
i915_enable_pipestat(dev_priv, 0, PIPE_CRC_DONE_ENABLE);
i915_enable_pipestat(dev_priv, 1, PIPE_CRC_DONE_ENABLE);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
return 0; return 0;
} }
...@@ -2857,6 +2866,7 @@ static int i915_irq_postinstall(struct drm_device *dev) ...@@ -2857,6 +2866,7 @@ static int i915_irq_postinstall(struct drm_device *dev)
{ {
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
u32 enable_mask; u32 enable_mask;
unsigned long irqflags;
I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH)); I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH));
...@@ -2892,6 +2902,13 @@ static int i915_irq_postinstall(struct drm_device *dev) ...@@ -2892,6 +2902,13 @@ static int i915_irq_postinstall(struct drm_device *dev)
i915_enable_asle_pipestat(dev); i915_enable_asle_pipestat(dev);
/* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy. */
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
i915_enable_pipestat(dev_priv, 0, PIPE_CRC_DONE_ENABLE);
i915_enable_pipestat(dev_priv, 1, PIPE_CRC_DONE_ENABLE);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
return 0; return 0;
} }
...@@ -3105,6 +3122,8 @@ static int i965_irq_postinstall(struct drm_device *dev) ...@@ -3105,6 +3122,8 @@ static int i965_irq_postinstall(struct drm_device *dev)
* just to make the assert_spin_locked check happy. */ * just to make the assert_spin_locked check happy. */
spin_lock_irqsave(&dev_priv->irq_lock, irqflags); spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
i915_enable_pipestat(dev_priv, 0, PIPE_GMBUS_EVENT_ENABLE); i915_enable_pipestat(dev_priv, 0, PIPE_GMBUS_EVENT_ENABLE);
i915_enable_pipestat(dev_priv, 0, PIPE_CRC_DONE_ENABLE);
i915_enable_pipestat(dev_priv, 1, PIPE_CRC_DONE_ENABLE);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
/* /*
......
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