Commit 37d9a8c5 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Fix included-by file reference comments
  x86, cpu: Only CPU features determine NX capabilities
  x86, cpu: Call verify_cpu during 32bit CPU startup
  x86, cpu: Clear XD_DISABLED flag on Intel to regain NX
  x86, cpu: Rename verify_cpu_64.S to verify_cpu.S
parents 017892c3 79250af2
...@@ -182,7 +182,7 @@ no_longmode: ...@@ -182,7 +182,7 @@ no_longmode:
hlt hlt
jmp 1b jmp 1b
#include "../../kernel/verify_cpu_64.S" #include "../../kernel/verify_cpu.S"
/* /*
* Be careful here startup_64 needs to be at a predictable * Be careful here startup_64 needs to be at a predictable
......
...@@ -316,6 +316,10 @@ ENTRY(startup_32_smp) ...@@ -316,6 +316,10 @@ ENTRY(startup_32_smp)
subl $0x80000001, %eax subl $0x80000001, %eax
cmpl $(0x8000ffff-0x80000001), %eax cmpl $(0x8000ffff-0x80000001), %eax
ja 6f ja 6f
/* Clear bogus XD_DISABLE bits */
call verify_cpu
mov $0x80000001, %eax mov $0x80000001, %eax
cpuid cpuid
/* Execute Disable bit supported? */ /* Execute Disable bit supported? */
...@@ -611,6 +615,8 @@ ignore_int: ...@@ -611,6 +615,8 @@ ignore_int:
#endif #endif
iret iret
#include "verify_cpu.S"
__REFDATA __REFDATA
.align 4 .align 4
ENTRY(initial_code) ENTRY(initial_code)
......
...@@ -127,7 +127,7 @@ startup_64: ...@@ -127,7 +127,7 @@ startup_64:
no_longmode: no_longmode:
hlt hlt
jmp no_longmode jmp no_longmode
#include "verify_cpu_64.S" #include "verify_cpu.S"
# Careful these need to be in the same 64K segment as the above; # Careful these need to be in the same 64K segment as the above;
tidt: tidt:
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
* Copyright (c) 2007 Andi Kleen (ak@suse.de) * Copyright (c) 2007 Andi Kleen (ak@suse.de)
* Copyright (c) 2007 Eric Biederman (ebiederm@xmission.com) * Copyright (c) 2007 Eric Biederman (ebiederm@xmission.com)
* Copyright (c) 2007 Vivek Goyal (vgoyal@in.ibm.com) * Copyright (c) 2007 Vivek Goyal (vgoyal@in.ibm.com)
* Copyright (c) 2010 Kees Cook (kees.cook@canonical.com)
* *
* This source code is licensed under the GNU General Public License, * This source code is licensed under the GNU General Public License,
* Version 2. See the file COPYING for more details. * Version 2. See the file COPYING for more details.
...@@ -14,18 +15,17 @@ ...@@ -14,18 +15,17 @@
* This is a common code for verification whether CPU supports * This is a common code for verification whether CPU supports
* long mode and SSE or not. It is not called directly instead this * long mode and SSE or not. It is not called directly instead this
* file is included at various places and compiled in that context. * file is included at various places and compiled in that context.
* Following are the current usage. * This file is expected to run in 32bit code. Currently:
* *
* This file is included by both 16bit and 32bit code. * arch/x86/boot/compressed/head_64.S: Boot cpu verification
* arch/x86/kernel/trampoline_64.S: secondary processor verfication
* arch/x86/kernel/head_32.S: processor startup
* *
* arch/x86_64/boot/setup.S : Boot cpu verification (16bit) * verify_cpu, returns the status of longmode and SSE in register %eax.
* arch/x86_64/boot/compressed/head.S: Boot cpu verification (32bit)
* arch/x86_64/kernel/trampoline.S: secondary processor verfication (16bit)
* arch/x86_64/kernel/acpi/wakeup.S:Verfication at resume (16bit)
*
* verify_cpu, returns the status of cpu check in register %eax.
* 0: Success 1: Failure * 0: Success 1: Failure
* *
* On Intel, the XD_DISABLE flag will be cleared as a side-effect.
*
* The caller needs to check for the error code and take the action * The caller needs to check for the error code and take the action
* appropriately. Either display a message or halt. * appropriately. Either display a message or halt.
*/ */
...@@ -62,8 +62,41 @@ verify_cpu: ...@@ -62,8 +62,41 @@ verify_cpu:
cmpl $0x444d4163,%ecx cmpl $0x444d4163,%ecx
jnz verify_cpu_noamd jnz verify_cpu_noamd
mov $1,%di # cpu is from AMD mov $1,%di # cpu is from AMD
jmp verify_cpu_check
verify_cpu_noamd: verify_cpu_noamd:
cmpl $0x756e6547,%ebx # GenuineIntel?
jnz verify_cpu_check
cmpl $0x49656e69,%edx
jnz verify_cpu_check
cmpl $0x6c65746e,%ecx
jnz verify_cpu_check
# only call IA32_MISC_ENABLE when:
# family > 6 || (family == 6 && model >= 0xd)
movl $0x1, %eax # check CPU family and model
cpuid
movl %eax, %ecx
andl $0x0ff00f00, %eax # mask family and extended family
shrl $8, %eax
cmpl $6, %eax
ja verify_cpu_clear_xd # family > 6, ok
jb verify_cpu_check # family < 6, skip
andl $0x000f00f0, %ecx # mask model and extended model
shrl $4, %ecx
cmpl $0xd, %ecx
jb verify_cpu_check # family == 6, model < 0xd, skip
verify_cpu_clear_xd:
movl $MSR_IA32_MISC_ENABLE, %ecx
rdmsr
btrl $2, %edx # clear MSR_IA32_MISC_ENABLE_XD_DISABLE
jnc verify_cpu_check # only write MSR if bit was changed
wrmsr
verify_cpu_check:
movl $0x1,%eax # Does the cpu have what it takes movl $0x1,%eax # Does the cpu have what it takes
cpuid cpuid
andl $REQUIRED_MASK0,%edx andl $REQUIRED_MASK0,%edx
......
...@@ -41,7 +41,7 @@ void __init x86_report_nx(void) ...@@ -41,7 +41,7 @@ void __init x86_report_nx(void)
{ {
if (!cpu_has_nx) { if (!cpu_has_nx) {
printk(KERN_NOTICE "Notice: NX (Execute Disable) protection " printk(KERN_NOTICE "Notice: NX (Execute Disable) protection "
"missing in CPU or disabled in BIOS!\n"); "missing in CPU!\n");
} else { } else {
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
if (disable_nx) { if (disable_nx) {
......
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