ARM: dts: qcom: sdx55: Add support for A7 PLL clock
On SDX55 there is a separate A7 PLL which is used to provide high frequency clock to the Cortex A7 CPU via a MUX. Signed-off-by:Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-2-manivannan.sadhasivam@linaro.orgSigned-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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