Commit 383d30e7 authored by Jiaxin Yu's avatar Jiaxin Yu Committed by Mark Brown

ASoC: Mediatek: MT8183: fix compile error

mtk_regmap_update_bits() has been changed to take a shift and warn
when reg >= 0 but shift < 0.So the hd_align_mshift must not have shift.
Change it from XXX_HD_ALIGN_MASK_SFT to XXX_HD_ALIGN_MASK.

Fixes: cf61f5b0 ("ASoC: Mediatek: MT8183: set data align")
Signed-off-by: default avatarJiaxin Yu <jiaxin.yu@mediatek.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent e355d3de
...@@ -439,7 +439,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -439,7 +439,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = DL1_HD_SFT, .hd_shift = DL1_HD_SFT,
.hd_align_mshift = DL1_HD_ALIGN_MASK_SFT, .hd_align_mshift = DL1_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -460,7 +460,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -460,7 +460,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = DL2_HD_SFT, .hd_shift = DL2_HD_SFT,
.hd_align_mshift = DL2_HD_ALIGN_MASK_SFT, .hd_align_mshift = DL2_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -481,7 +481,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -481,7 +481,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = DL3_HD_SFT, .hd_shift = DL3_HD_SFT,
.hd_align_mshift = DL3_HD_ALIGN_MASK_SFT, .hd_align_mshift = DL3_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -502,7 +502,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -502,7 +502,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = VUL2_HD_SFT, .hd_shift = VUL2_HD_SFT,
.hd_align_mshift = VUL2_HD_ALIGN_MASK_SFT, .hd_align_mshift = VUL2_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -523,7 +523,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -523,7 +523,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = AWB_HD_SFT, .hd_shift = AWB_HD_SFT,
.hd_align_mshift = AWB_HD_ALIGN_MASK_SFT, .hd_align_mshift = AWB_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -544,7 +544,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -544,7 +544,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = AWB2_HD_SFT, .hd_shift = AWB2_HD_SFT,
.hd_align_mshift = AWB2_ALIGN_MASK_SFT, .hd_align_mshift = AWB2_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -565,7 +565,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -565,7 +565,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = VUL12_HD_SFT, .hd_shift = VUL12_HD_SFT,
.hd_align_mshift = VUL12_HD_ALIGN_MASK_SFT, .hd_align_mshift = VUL12_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -586,7 +586,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -586,7 +586,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = MOD_DAI_HD_SFT, .hd_shift = MOD_DAI_HD_SFT,
.hd_align_mshift = MOD_DAI_HD_ALIGN_MASK_SFT, .hd_align_mshift = MOD_DAI_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
...@@ -607,7 +607,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -607,7 +607,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_align_reg = AFE_MEMIF_HDALIGN, .hd_align_reg = AFE_MEMIF_HDALIGN,
.hd_shift = HDMI_HD_SFT, .hd_shift = HDMI_HD_SFT,
.hd_align_mshift = HDMI_HD_ALIGN_MASK_SFT, .hd_align_mshift = HDMI_HD_ALIGN_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1, .agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
......
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