Commit 3969c9c9 authored by Jesse Barnes's avatar Jesse Barnes Committed by Chris Wilson

drm/i915: don't change VDD AUX status in panel power functions

Mode set sequence outlines when the AUX VDD bit should be set and
cleared, and it's separate from the panel power sequence.
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 33a34e4e
...@@ -783,7 +783,7 @@ static bool ironlake_edp_panel_on (struct drm_device *dev) ...@@ -783,7 +783,7 @@ static bool ironlake_edp_panel_on (struct drm_device *dev)
DRM_ERROR("panel on wait timed out: 0x%08x\n", DRM_ERROR("panel on wait timed out: 0x%08x\n",
I915_READ(PCH_PP_STATUS)); I915_READ(PCH_PP_STATUS));
pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD); pp &= ~(PANEL_UNLOCK_REGS);
pp |= PANEL_POWER_RESET; /* restore panel reset bit */ pp |= PANEL_POWER_RESET; /* restore panel reset bit */
I915_WRITE(PCH_PP_CONTROL, pp); I915_WRITE(PCH_PP_CONTROL, pp);
POSTING_READ(PCH_PP_CONTROL); POSTING_READ(PCH_PP_CONTROL);
...@@ -811,7 +811,7 @@ static void ironlake_edp_panel_off (struct drm_device *dev) ...@@ -811,7 +811,7 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
I915_READ(PCH_PP_STATUS)); I915_READ(PCH_PP_STATUS));
/* Make sure VDD is enabled so DP AUX will work */ /* Make sure VDD is enabled so DP AUX will work */
pp |= EDP_FORCE_VDD | PANEL_POWER_RESET; /* restore panel reset bit */ pp |= PANEL_POWER_RESET; /* restore panel reset bit */
I915_WRITE(PCH_PP_CONTROL, pp); I915_WRITE(PCH_PP_CONTROL, pp);
POSTING_READ(PCH_PP_CONTROL); POSTING_READ(PCH_PP_CONTROL);
} }
......
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