Commit 3990c991 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'v5.3-rockchip-dts64-1' of...

Merge tag 'v5.3-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

PCIe for rockpro64, wifi+bt for Rock-PI4, spi for Rock960 family
and a fix for the yet unused isp-iommus.

* tag 'v5.3-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add WiFi+BT support on ROCK Pi4 board
  arm64: dts: rockchip: fix isp iommu clocks and power domain
  arm64: dts: rockchip: Enable SPI1 on Ficus
  arm64: dts: rockchip: Enable SPI0 and SPI4 on Rock960
  arm64: dts: rockchip: add PCIe nodes on rk3399-rockpro64
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5b8ea6bf 45fa7c38
...@@ -146,6 +146,12 @@ bt_led: bt_led { ...@@ -146,6 +146,12 @@ bt_led: bt_led {
}; };
}; };
&spi1 {
/* On both Low speed and High speed expansion */
cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
status = "okay";
};
&usbdrd_dwc3_0 { &usbdrd_dwc3_0 {
dr_mode = "host"; dr_mode = "host";
}; };
......
...@@ -25,6 +25,15 @@ clkin_gmac: external-gmac-clock { ...@@ -25,6 +25,15 @@ clkin_gmac: external-gmac-clock {
#clock-cells = <0>; #clock-cells = <0>;
}; };
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk808 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
};
vcc12v_dcin: dc-12v { vcc12v_dcin: dc-12v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin"; regulator-name = "vcc12v_dcin";
...@@ -451,12 +460,46 @@ &pmu_io_domains { ...@@ -451,12 +460,46 @@ &pmu_io_domains {
}; };
&pinctrl { &pinctrl {
bt {
bt_enable_h: bt-enable-h {
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_host_wake_l: bt-host-wake-l {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_l: bt-wake-l {
rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie { pcie {
pcie_pwr_en: pcie-pwr-en { pcie_pwr_en: pcie-pwr-en {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
}; };
sdio0 {
sdio0_bus4: sdio0-bus4 {
rockchip,pins =
<2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
<2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
<2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
<2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
};
sdio0_cmd: sdio0-cmd {
rockchip,pins =
<2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
};
sdio0_clk: sdio0-clk {
rockchip,pins =
<2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
};
};
pmic { pmic {
pmic_int_l: pmic-int-l { pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
...@@ -482,6 +525,17 @@ vcc5v0_host_en: vcc5v0-host-en { ...@@ -482,6 +525,17 @@ vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
}; };
wifi {
wifi_enable_h: wifi-enable-h {
rockchip,pins =
<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_host_wake_l: wifi-host-wake-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
}; };
&pwm2 { &pwm2 {
...@@ -494,6 +548,32 @@ &saradc { ...@@ -494,6 +548,32 @@ &saradc {
vref-supply = <&vcc_1v8>; vref-supply = <&vcc_1v8>;
}; };
&sdio0 {
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
clock-frequency = <50000000>;
cap-sdio-irq;
cap-sd-highspeed;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
status = "okay";
brcmf: wifi@1 {
compatible = "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_l>;
};
};
&sdmmc { &sdmmc {
bus-width = <4>; bus-width = <4>;
cap-mmc-highspeed; cap-mmc-highspeed;
...@@ -557,6 +637,23 @@ u2phy1_host: host-port { ...@@ -557,6 +637,23 @@ u2phy1_host: host-port {
}; };
}; };
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&rk808 1>;
clock-names = "ext_clock";
device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
};
};
&uart2 { &uart2 {
status = "okay"; status = "okay";
}; };
......
...@@ -114,6 +114,16 @@ host_vbus_drv: host-vbus-drv { ...@@ -114,6 +114,16 @@ host_vbus_drv: host-vbus-drv {
}; };
}; };
&spi0 {
/* On Low speed expansion (LS-SPI0) */
status = "okay";
};
&spi4 {
/* On High speed expansion (HS-SPI1) */
status = "okay";
};
&usbdrd_dwc3_0 { &usbdrd_dwc3_0 {
dr_mode = "otg"; dr_mode = "otg";
}; };
......
...@@ -513,6 +513,20 @@ &io_domains { ...@@ -513,6 +513,20 @@ &io_domains {
gpio1830-supply = <&vcc_3v0>; gpio1830-supply = <&vcc_3v0>;
}; };
&pcie0 {
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_perst>;
vpcie12v-supply = <&vcc12v_dcin>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pmu_io_domains { &pmu_io_domains {
pmu1830-supply = <&vcc_3v0>; pmu1830-supply = <&vcc_3v0>;
status = "okay"; status = "okay";
...@@ -542,6 +556,10 @@ diy_led_gpio: diy_led-gpio { ...@@ -542,6 +556,10 @@ diy_led_gpio: diy_led-gpio {
}; };
pcie { pcie {
pcie_perst: pcie-perst {
rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_pwr_en: pcie-pwr-en { pcie_pwr_en: pcie-pwr-en {
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
......
...@@ -1706,11 +1706,11 @@ isp0_mmu: iommu@ff914000 { ...@@ -1706,11 +1706,11 @@ isp0_mmu: iommu@ff914000 {
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "isp0_mmu"; interrupt-names = "isp0_mmu";
clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>; clocks = <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
#iommu-cells = <0>; #iommu-cells = <0>;
power-domains = <&power RK3399_PD_ISP0>;
rockchip,disable-mmu-reset; rockchip,disable-mmu-reset;
status = "disabled";
}; };
isp1_mmu: iommu@ff924000 { isp1_mmu: iommu@ff924000 {
...@@ -1718,11 +1718,11 @@ isp1_mmu: iommu@ff924000 { ...@@ -1718,11 +1718,11 @@ isp1_mmu: iommu@ff924000 {
reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>; reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "isp1_mmu"; interrupt-names = "isp1_mmu";
clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>; clocks = <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
#iommu-cells = <0>; #iommu-cells = <0>;
power-domains = <&power RK3399_PD_ISP1>;
rockchip,disable-mmu-reset; rockchip,disable-mmu-reset;
status = "disabled";
}; };
hdmi_sound: hdmi-sound { hdmi_sound: hdmi-sound {
......
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