Commit 39a096d6 authored by David S. Miller's avatar David S. Miller

Merge branch 'ravb-cleanups'

Niklas Söderlund says:

====================
ravb: Align Rx descriptor setup and maintenance

When RZ/G2L support was added the Rx code path was split in two, one to
support R-Car and one to support RZ/G2L. One reason for this is that
R-Car uses the extended Rx descriptor format, while RZ/G2L uses the
normal descriptor format.

In many aspects this is not needed as the extended descriptor format is
just a normal descriptor with extra metadata (timestamsp) appended. And
the R-Car SoCs can also use normal descriptors if hardware timestamps
were not desired. This split has led to RZ/G2L gaining support for
split descriptors in the Rx path while R-Car still lacks this.

This series is the first step in trying to merge the R-Car and RZ/G2L Rx
paths so features and bugs corrected in one will benefit the other.

The first patch in the series clarifies that the driver now supports
either normal or extended descriptors, not both at the same time by
grouping them in a union. This is the foundation that later patches will
build on the aligning the two Rx paths.

Patches 2-5 deals with correcting small issues in the Rx frame and
descriptor sizes that either were incorrect at the time they were added
in 2017 (my bad) or concepts built on-top of this initial incorrect
design.

While finally patch 6 merges the R-Car and RZ/G2L for Rx descriptor
setup and maintenance.

When this work has landed I plan to follow up with more work aligning
the rest of the Rx code paths and hopefully bring split descriptor
support to the R-Car SoCs.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents dbb0b6ca 644d037b
...@@ -1015,11 +1015,6 @@ enum CSR2_BIT { ...@@ -1015,11 +1015,6 @@ enum CSR2_BIT {
#define NUM_RX_QUEUE 2 #define NUM_RX_QUEUE 2
#define NUM_TX_QUEUE 2 #define NUM_TX_QUEUE 2
#define RX_BUF_SZ (2048 - ETH_FCS_LEN + sizeof(__sum16))
#define GBETH_RX_BUFF_MAX 8192
#define GBETH_RX_DESC_DATA_SIZE 4080
struct ravb_tstamp_skb { struct ravb_tstamp_skb {
struct list_head list; struct list_head list;
struct sk_buff *skb; struct sk_buff *skb;
...@@ -1044,9 +1039,6 @@ struct ravb_ptp { ...@@ -1044,9 +1039,6 @@ struct ravb_ptp {
}; };
struct ravb_hw_info { struct ravb_hw_info {
void (*rx_ring_free)(struct net_device *ndev, int q);
void (*rx_ring_format)(struct net_device *ndev, int q);
void *(*alloc_rx_desc)(struct net_device *ndev, int q);
bool (*receive)(struct net_device *ndev, int *quota, int q); bool (*receive)(struct net_device *ndev, int *quota, int q);
void (*set_rate)(struct net_device *ndev); void (*set_rate)(struct net_device *ndev);
int (*set_feature)(struct net_device *ndev, netdev_features_t features); int (*set_feature)(struct net_device *ndev, netdev_features_t features);
...@@ -1057,9 +1049,10 @@ struct ravb_hw_info { ...@@ -1057,9 +1049,10 @@ struct ravb_hw_info {
netdev_features_t net_hw_features; netdev_features_t net_hw_features;
netdev_features_t net_features; netdev_features_t net_features;
int stats_len; int stats_len;
size_t max_rx_len;
u32 tccr_mask; u32 tccr_mask;
u32 rx_max_buf_size; u32 rx_max_frame_size;
u32 rx_max_desc_use;
u32 rx_desc_size;
unsigned aligned_tx: 1; unsigned aligned_tx: 1;
/* hardware features */ /* hardware features */
...@@ -1092,8 +1085,11 @@ struct ravb_private { ...@@ -1092,8 +1085,11 @@ struct ravb_private {
struct ravb_desc *desc_bat; struct ravb_desc *desc_bat;
dma_addr_t rx_desc_dma[NUM_RX_QUEUE]; dma_addr_t rx_desc_dma[NUM_RX_QUEUE];
dma_addr_t tx_desc_dma[NUM_TX_QUEUE]; dma_addr_t tx_desc_dma[NUM_TX_QUEUE];
struct ravb_rx_desc *gbeth_rx_ring; union {
struct ravb_ex_rx_desc *rx_ring[NUM_RX_QUEUE]; struct ravb_rx_desc *desc;
struct ravb_ex_rx_desc *ex_desc;
void *raw;
} rx_ring[NUM_RX_QUEUE];
struct ravb_tx_desc *tx_ring[NUM_TX_QUEUE]; struct ravb_tx_desc *tx_ring[NUM_TX_QUEUE];
void *tx_align[NUM_TX_QUEUE]; void *tx_align[NUM_TX_QUEUE];
struct sk_buff *rx_1st_skb; struct sk_buff *rx_1st_skb;
......
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