Commit 3a1e3c48 authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Chris Wilson

drm/i915/uc: Drop explicit gt param in some uc_fw functions

There is no need to pass explicit gt since we already have
a trick to get parent gt from uc_fw, we only need to use it.
Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191211124549.59516-3-michal.wajdeczko@intel.com
parent cb1b7ad0
...@@ -149,7 +149,7 @@ int intel_guc_fw_upload(struct intel_guc *guc) ...@@ -149,7 +149,7 @@ int intel_guc_fw_upload(struct intel_guc *guc)
* Current uCode expects the code to be loaded at 8k; locations below * Current uCode expects the code to be loaded at 8k; locations below
* this are used for the stack. * this are used for the stack.
*/ */
ret = intel_uc_fw_upload(&guc->fw, gt, 0x2000, UOS_MOVE); ret = intel_uc_fw_upload(&guc->fw, 0x2000, UOS_MOVE);
if (ret) if (ret)
goto out; goto out;
......
...@@ -39,5 +39,5 @@ void intel_huc_fw_init_early(struct intel_huc *huc) ...@@ -39,5 +39,5 @@ void intel_huc_fw_init_early(struct intel_huc *huc)
int intel_huc_fw_upload(struct intel_huc *huc) int intel_huc_fw_upload(struct intel_huc *huc)
{ {
/* HW doesn't look at destination address for HuC, so set it to 0 */ /* HW doesn't look at destination address for HuC, so set it to 0 */
return intel_uc_fw_upload(&huc->fw, huc_to_gt(huc), 0, HUC_UKERNEL); return intel_uc_fw_upload(&huc->fw, 0, HUC_UKERNEL);
} }
...@@ -400,11 +400,10 @@ static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw, struct i915_ggtt *ggtt) ...@@ -400,11 +400,10 @@ static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw, struct i915_ggtt *ggtt)
return lower_32_bits(node->start); return lower_32_bits(node->start);
} }
static void intel_uc_fw_ggtt_bind(struct intel_uc_fw *uc_fw, static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw)
struct intel_gt *gt)
{ {
struct drm_i915_gem_object *obj = uc_fw->obj; struct drm_i915_gem_object *obj = uc_fw->obj;
struct i915_ggtt *ggtt = gt->ggtt; struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
struct i915_vma dummy = { struct i915_vma dummy = {
.node.start = uc_fw_ggtt_offset(uc_fw, ggtt), .node.start = uc_fw_ggtt_offset(uc_fw, ggtt),
.node.size = obj->base.size, .node.size = obj->base.size,
...@@ -421,19 +420,18 @@ static void intel_uc_fw_ggtt_bind(struct intel_uc_fw *uc_fw, ...@@ -421,19 +420,18 @@ static void intel_uc_fw_ggtt_bind(struct intel_uc_fw *uc_fw,
ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0); ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0);
} }
static void intel_uc_fw_ggtt_unbind(struct intel_uc_fw *uc_fw, static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw)
struct intel_gt *gt)
{ {
struct drm_i915_gem_object *obj = uc_fw->obj; struct drm_i915_gem_object *obj = uc_fw->obj;
struct i915_ggtt *ggtt = gt->ggtt; struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
u64 start = uc_fw_ggtt_offset(uc_fw, ggtt); u64 start = uc_fw_ggtt_offset(uc_fw, ggtt);
ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size);
} }
static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt, static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
u32 wopcm_offset, u32 dma_flags)
{ {
struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
struct intel_uncore *uncore = gt->uncore; struct intel_uncore *uncore = gt->uncore;
u64 offset; u64 offset;
int ret; int ret;
...@@ -451,7 +449,7 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt, ...@@ -451,7 +449,7 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));
/* Set the DMA destination */ /* Set the DMA destination */
intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, wopcm_offset); intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset);
intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);
/* /*
...@@ -483,17 +481,16 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt, ...@@ -483,17 +481,16 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
/** /**
* intel_uc_fw_upload - load uC firmware using custom loader * intel_uc_fw_upload - load uC firmware using custom loader
* @uc_fw: uC firmware * @uc_fw: uC firmware
* @gt: the intel_gt structure * @dst_offset: destination offset
* @wopcm_offset: destination offset in wopcm
* @dma_flags: flags for flags for dma ctrl * @dma_flags: flags for flags for dma ctrl
* *
* Loads uC firmware and updates internal flags. * Loads uC firmware and updates internal flags.
* *
* Return: 0 on success, non-zero on failure. * Return: 0 on success, non-zero on failure.
*/ */
int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt, int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
u32 wopcm_offset, u32 dma_flags)
{ {
struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
int err; int err;
/* make sure the status was cleared the last time we reset the uc */ /* make sure the status was cleared the last time we reset the uc */
...@@ -507,9 +504,9 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt, ...@@ -507,9 +504,9 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
return -ENOEXEC; return -ENOEXEC;
/* Call custom loader */ /* Call custom loader */
intel_uc_fw_ggtt_bind(uc_fw, gt); uc_fw_bind_ggtt(uc_fw);
err = uc_fw_xfer(uc_fw, gt, wopcm_offset, dma_flags); err = uc_fw_xfer(uc_fw, dst_offset, dma_flags);
intel_uc_fw_ggtt_unbind(uc_fw, gt); uc_fw_unbind_ggtt(uc_fw);
if (err) if (err)
goto fail; goto fail;
......
...@@ -231,8 +231,7 @@ void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, ...@@ -231,8 +231,7 @@ void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
enum intel_platform platform, u8 rev); enum intel_platform platform, u8 rev);
int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw); int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw);
void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw); void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw);
int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt, int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 offset, u32 dma_flags);
u32 wopcm_offset, u32 dma_flags);
int intel_uc_fw_init(struct intel_uc_fw *uc_fw); int intel_uc_fw_init(struct intel_uc_fw *uc_fw);
void intel_uc_fw_fini(struct intel_uc_fw *uc_fw); void intel_uc_fw_fini(struct intel_uc_fw *uc_fw);
size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len); size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len);
......
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