Commit 3b1fe1ab authored by Tomi Valkeinen's avatar Tomi Valkeinen Committed by Mauro Carvalho Chehab

media: ti-vpe: cal: catch VC errors

CAL driver currently ignores VC related errors. To help catch error
conditions, enable all the VC error interrupts and handle them in the
interrupt handler by printing an error.
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent aece634d
...@@ -226,24 +226,41 @@ static void cal_camerarx_enable_irqs(struct cal_camerarx *phy) ...@@ -226,24 +226,41 @@ static void cal_camerarx_enable_irqs(struct cal_camerarx *phy)
CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK | CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK |
CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK | CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK |
CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK; CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK;
const u32 vc_err_mask =
/* Enable CIO error IRQs. */ CAL_CSI2_VC_IRQ_CS_IRQ_MASK(0) |
CAL_CSI2_VC_IRQ_CS_IRQ_MASK(1) |
CAL_CSI2_VC_IRQ_CS_IRQ_MASK(2) |
CAL_CSI2_VC_IRQ_CS_IRQ_MASK(3) |
CAL_CSI2_VC_IRQ_ECC_CORRECTION_IRQ_MASK(0) |
CAL_CSI2_VC_IRQ_ECC_CORRECTION_IRQ_MASK(1) |
CAL_CSI2_VC_IRQ_ECC_CORRECTION_IRQ_MASK(2) |
CAL_CSI2_VC_IRQ_ECC_CORRECTION_IRQ_MASK(3);
/* Enable CIO & VC error IRQs. */
cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0),
CAL_HL_IRQ_CIO_MASK(phy->instance)); CAL_HL_IRQ_CIO_MASK(phy->instance) |
CAL_HL_IRQ_VC_MASK(phy->instance));
cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance),
cio_err_mask); cio_err_mask);
cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(phy->instance),
vc_err_mask);
} }
static void cal_camerarx_disable_irqs(struct cal_camerarx *phy) static void cal_camerarx_disable_irqs(struct cal_camerarx *phy)
{ {
/* Disable CIO error irqs */ /* Disable CIO error irqs */
cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0),
CAL_HL_IRQ_CIO_MASK(phy->instance)); CAL_HL_IRQ_CIO_MASK(phy->instance) |
CAL_HL_IRQ_VC_MASK(phy->instance));
cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0); cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0);
cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(phy->instance), 0);
} }
static void cal_camerarx_ppi_enable(struct cal_camerarx *phy) static void cal_camerarx_ppi_enable(struct cal_camerarx *phy)
{ {
cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance),
1, CAL_CSI2_PPI_CTRL_ECC_EN_MASK);
cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance),
1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK);
} }
......
...@@ -576,6 +576,16 @@ static irqreturn_t cal_irq(int irq_cal, void *data) ...@@ -576,6 +576,16 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
cal_write(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i), cal_write(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i),
cio_stat); cio_stat);
} }
if (status & CAL_HL_IRQ_VC_MASK(i)) {
u32 vc_stat = cal_read(cal, CAL_CSI2_VC_IRQSTATUS(i));
dev_err_ratelimited(cal->dev,
"CIO%u VC error: %#08x\n",
i, vc_stat);
cal_write(cal, CAL_CSI2_VC_IRQSTATUS(i), vc_stat);
}
} }
} }
......
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