Commit 3b271148 authored by Avi Kivity's avatar Avi Kivity Committed by Greg Kroah-Hartman

KVM: MMU: Segregate shadow pages with different cr0.wp

When cr0.wp=0, we may shadow a gpte having u/s=1 and r/w=0 with an spte
having u/s=0 and r/w=1.  This allows excessive access if the guest sets
cr0.wp=1 and accesses through this spte.

Fix by making cr0.wp part of the base role; we'll have different sptes for
the two cases and the problem disappears.
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
(cherry picked from commit 3dbe1415)
parent e4a13296
...@@ -193,6 +193,7 @@ union kvm_mmu_page_role { ...@@ -193,6 +193,7 @@ union kvm_mmu_page_role {
unsigned invalid:1; unsigned invalid:1;
unsigned cr4_pge:1; unsigned cr4_pge:1;
unsigned nxe:1; unsigned nxe:1;
unsigned cr0_wp:1;
}; };
}; };
......
...@@ -221,7 +221,7 @@ void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, ...@@ -221,7 +221,7 @@ void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
} }
EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
static int is_write_protection(struct kvm_vcpu *vcpu) static bool is_write_protection(struct kvm_vcpu *vcpu)
{ {
return vcpu->arch.cr0 & X86_CR0_WP; return vcpu->arch.cr0 & X86_CR0_WP;
} }
...@@ -2445,6 +2445,7 @@ static int init_kvm_softmmu(struct kvm_vcpu *vcpu) ...@@ -2445,6 +2445,7 @@ static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
r = paging32_init_context(vcpu); r = paging32_init_context(vcpu);
vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level; vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
return r; return r;
} }
......
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