Commit 3b2d0bb5 authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branches 'asoc/topic/cs43130', 'asoc/topic/cs53l30',...

Merge remote-tracking branches 'asoc/topic/cs43130', 'asoc/topic/cs53l30', 'asoc/topic/cygnus' and 'asoc/topic/davinci' into asoc-next
CS43130 DAC
Required properties:
- compatible : "cirrus,cs43130", "cirrus,cs4399", "cirrus,cs43131",
"cirrus,cs43198"
- reg : the I2C address of the device for I2C
- VA-supply, VP-supply, VL-supply, VCP-supply, VD-supply:
power supplies for the device, as covered in
Documentation/devicetree/bindings/regulator/regulator.txt.
Optional properties:
- reset-gpios : Active low GPIO used to reset the device
- cirrus,xtal-ibias:
When external MCLK is generated by external crystal
oscillator, CS43130 can be used to provide bias current
for external crystal. Amount of bias current sent is
set as:
1 = 7.5uA
2 = 12.5uA
3 = 15uA
- cirrus,dc-measure:
Boolean, define to enable headphone DC impedance measurement.
- cirrus,ac-measure:
Boolean, define to enable headphone AC impedance measurement.
DC impedance must also be enabled for AC impedance measurement.
- cirrus,dc-threshold:
Define 2 DC impedance thresholds in ohms for HP output control.
Default values are 50 and 120 Ohms.
- cirrus,ac-freq:
Define the frequencies at which to measure HP AC impedance.
Only used if "cirrus,dc-measure" is defined.
Exactly 10 frequencies must be defined.
If this properties is undefined, by default,
following frequencies are used:
<24 43 93 200 431 928 2000 4309 9283 20000>
The above frequencies are logarithmically equally spaced.
Log base is 10.
Example:
cs43130: audio-codec@30 {
compatible = "cirrus,cs43130";
reg = <0x30>;
reset-gpios = <&axi_gpio 54 0>;
VA-supply = <&dummy_vreg>;
VP-supply = <&dummy_vreg>;
VL-supply = <&dummy_vreg>;
VCP-supply = <&dummy_vreg>;
VD-supply = <&dummy_vreg>;
cirrus,xtal-ibias = <2>;
interrupt-parent = <&gpio0>;
interrupts = <55 8>;
cirrus,dc-measure;
cirrus,ac-measure;
cirrus,dc-threshold = /bits/ 16 <20 100>;
cirrus,ac-freq = /bits/ 16 <24 43 93 200 431 928 2000 4309 9283 20000>;
};
......@@ -27,12 +27,6 @@
#define DEFAULT_VCO 1354750204
#define CYGNUS_TDM_RATE \
(SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | \
SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_22050 | \
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000)
#define CAPTURE_FCI_ID_BASE 0x180
#define CYGNUS_SSP_TRISTATE_MASK 0x001fff
#define CYGNUS_PLLCLKSEL_MASK 0xf
......@@ -234,152 +228,20 @@ static const struct pll_macro_entry pll_predef_mclk[] = {
{98304000, 2},
};
#define CYGNUS_RATE_MIN 8000
#define CYGNUS_RATE_MAX 384000
/* List of valid frame sizes for tdm mode */
static const int ssp_valid_tdm_framesize[] = {32, 64, 128, 256, 512};
/*
* Use this relationship to derive the sampling rate (lrclk)
* lrclk = (mclk) / ((2*mclk_to_sclk_ratio) * (32 * SCLK))).
*
* Use mclk and pll_ch from the table above
*
* Valid SCLK = 0/1/2/4/8/12
*
* mclk_to_sclk_ratio = number of MCLK per SCLK. Division is twice the
* value programmed in this field.
* Valid mclk_to_sclk_ratio = 1 through to 15
*
* eg: To set lrclk = 48khz, set mclk = 12288000, mclk_to_sclk_ratio = 2,
* SCLK = 64
*/
struct _ssp_clk_coeff {
u32 mclk;
u32 sclk_rate;
u32 rate;
u32 mclk_rate;
static const unsigned int cygnus_rates[] = {
8000, 11025, 16000, 22050, 32000, 44100, 48000,
88200, 96000, 176400, 192000, 352800, 384000
};
static const struct _ssp_clk_coeff ssp_clk_coeff[] = {
{ 4096000, 32, 16000, 4},
{ 4096000, 32, 32000, 2},
{ 4096000, 64, 8000, 4},
{ 4096000, 64, 16000, 2},
{ 4096000, 64, 32000, 1},
{ 4096000, 128, 8000, 2},
{ 4096000, 128, 16000, 1},
{ 4096000, 256, 8000, 1},
{ 6144000, 32, 16000, 6},
{ 6144000, 32, 32000, 3},
{ 6144000, 32, 48000, 2},
{ 6144000, 32, 96000, 1},
{ 6144000, 64, 8000, 6},
{ 6144000, 64, 16000, 3},
{ 6144000, 64, 48000, 1},
{ 6144000, 128, 8000, 3},
{ 8192000, 32, 32000, 4},
{ 8192000, 64, 16000, 4},
{ 8192000, 64, 32000, 2},
{ 8192000, 128, 8000, 4},
{ 8192000, 128, 16000, 2},
{ 8192000, 128, 32000, 1},
{ 8192000, 256, 8000, 2},
{ 8192000, 256, 16000, 1},
{ 8192000, 512, 8000, 1},
{12288000, 32, 32000, 6},
{12288000, 32, 48000, 4},
{12288000, 32, 96000, 2},
{12288000, 32, 192000, 1},
{12288000, 64, 16000, 6},
{12288000, 64, 32000, 3},
{12288000, 64, 48000, 2},
{12288000, 64, 96000, 1},
{12288000, 128, 8000, 6},
{12288000, 128, 16000, 3},
{12288000, 128, 48000, 1},
{12288000, 256, 8000, 3},
{16384000, 64, 32000, 4},
{16384000, 128, 16000, 4},
{16384000, 128, 32000, 2},
{16384000, 256, 8000, 4},
{16384000, 256, 16000, 2},
{16384000, 256, 32000, 1},
{16384000, 512, 8000, 2},
{16384000, 512, 16000, 1},
{24576000, 32, 96000, 4},
{24576000, 32, 192000, 2},
{24576000, 64, 32000, 6},
{24576000, 64, 48000, 4},
{24576000, 64, 96000, 2},
{24576000, 64, 192000, 1},
{24576000, 128, 16000, 6},
{24576000, 128, 32000, 3},
{24576000, 128, 48000, 2},
{24576000, 256, 8000, 6},
{24576000, 256, 16000, 3},
{24576000, 256, 48000, 1},
{24576000, 512, 8000, 3},
{49152000, 32, 192000, 4},
{49152000, 64, 96000, 4},
{49152000, 64, 192000, 2},
{49152000, 128, 32000, 6},
{49152000, 128, 48000, 4},
{49152000, 128, 96000, 2},
{49152000, 128, 192000, 1},
{49152000, 256, 16000, 6},
{49152000, 256, 32000, 3},
{49152000, 256, 48000, 2},
{49152000, 256, 96000, 1},
{49152000, 512, 8000, 6},
{49152000, 512, 16000, 3},
{49152000, 512, 48000, 1},
{ 5644800, 32, 22050, 4},
{ 5644800, 32, 44100, 2},
{ 5644800, 32, 88200, 1},
{ 5644800, 64, 11025, 4},
{ 5644800, 64, 22050, 2},
{ 5644800, 64, 44100, 1},
{11289600, 32, 44100, 4},
{11289600, 32, 88200, 2},
{11289600, 32, 176400, 1},
{11289600, 64, 22050, 4},
{11289600, 64, 44100, 2},
{11289600, 64, 88200, 1},
{11289600, 128, 11025, 4},
{11289600, 128, 22050, 2},
{11289600, 128, 44100, 1},
{22579200, 32, 88200, 4},
{22579200, 32, 176400, 2},
{22579200, 64, 44100, 4},
{22579200, 64, 88200, 2},
{22579200, 64, 176400, 1},
{22579200, 128, 22050, 4},
{22579200, 128, 44100, 2},
{22579200, 128, 88200, 1},
{22579200, 256, 11025, 4},
{22579200, 256, 22050, 2},
{22579200, 256, 44100, 1},
{45158400, 32, 176400, 4},
{45158400, 64, 88200, 4},
{45158400, 64, 176400, 2},
{45158400, 128, 44100, 4},
{45158400, 128, 88200, 2},
{45158400, 128, 176400, 1},
{45158400, 256, 22050, 4},
{45158400, 256, 44100, 2},
{45158400, 256, 88200, 1},
{45158400, 512, 11025, 4},
{45158400, 512, 22050, 2},
{45158400, 512, 44100, 1},
static const struct snd_pcm_hw_constraint_list cygnus_rate_constraint = {
.count = ARRAY_SIZE(cygnus_rates),
.list = cygnus_rates,
};
static struct cygnus_aio_port *cygnus_dai_get_portinfo(struct snd_soc_dai *dai)
......@@ -679,40 +541,55 @@ static int pll_configure_mclk(struct cygnus_audio *cygaud, u32 mclk,
return p_entry->pll_ch_num;
}
static int cygnus_ssp_set_clocks(struct cygnus_aio_port *aio,
struct cygnus_audio *cygaud)
static int cygnus_ssp_set_clocks(struct cygnus_aio_port *aio)
{
u32 value, i = 0;
u32 value;
u32 mask = 0xf;
u32 sclk;
bool found = false;
const struct _ssp_clk_coeff *p_entry = NULL;
u32 mclk_rate;
unsigned int bit_rate;
unsigned int ratio;
for (i = 0; i < ARRAY_SIZE(ssp_clk_coeff); i++) {
p_entry = &ssp_clk_coeff[i];
if ((p_entry->rate == aio->lrclk) &&
(p_entry->sclk_rate == aio->bit_per_frame) &&
(p_entry->mclk == aio->mclk)) {
found = true;
break;
}
}
if (!found) {
bit_rate = aio->bit_per_frame * aio->lrclk;
/*
* Check if the bit clock can be generated from the given MCLK.
* MCLK must be a perfect multiple of bit clock and must be one of the
* following values... (2,4,6,8,10,12,14)
*/
if ((aio->mclk % bit_rate) != 0)
return -EINVAL;
ratio = aio->mclk / bit_rate;
switch (ratio) {
case 2:
case 4:
case 6:
case 8:
case 10:
case 12:
case 14:
mclk_rate = ratio / 2;
break;
default:
dev_err(aio->cygaud->dev,
"No valid match found in ssp_clk_coeff array\n");
"Invalid combination of MCLK and BCLK\n");
dev_err(aio->cygaud->dev, "lrclk = %u, bits/frame = %u, mclk = %u\n",
aio->lrclk, aio->bit_per_frame, aio->mclk);
return -EINVAL;
}
sclk = aio->bit_per_frame;
if (sclk == 512)
sclk = 0;
/* sclks_per_1fs_div = sclk cycles/32 */
sclk /= 32;
/* Set sclk rate */
switch (aio->port_type) {
case PORT_TDM:
sclk = aio->bit_per_frame;
if (sclk == 512)
sclk = 0;
/* sclks_per_1fs_div = sclk cycles/32 */
sclk /= 32;
/* Set number of bitclks per frame */
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
value &= ~(mask << I2S_OUT_CFGX_SCLKS_PER_1FS_DIV32);
......@@ -731,7 +608,7 @@ static int cygnus_ssp_set_clocks(struct cygnus_aio_port *aio,
/* Set MCLK_RATE ssp port (spdif and ssp are the same) */
value = readl(aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
value &= ~(0xf << I2S_OUT_MCLKRATE_SHIFT);
value |= (p_entry->mclk_rate << I2S_OUT_MCLKRATE_SHIFT);
value |= (mclk_rate << I2S_OUT_MCLKRATE_SHIFT);
writel(value, aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
dev_dbg(aio->cygaud->dev, "mclk cfg reg = 0x%x\n", value);
......@@ -745,7 +622,6 @@ static int cygnus_ssp_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct cygnus_aio_port *aio = cygnus_dai_get_portinfo(dai);
struct cygnus_audio *cygaud = snd_soc_dai_get_drvdata(dai);
int rate, bitres;
u32 value;
u32 mask = 0x1f;
......@@ -841,7 +717,7 @@ static int cygnus_ssp_hw_params(struct snd_pcm_substream *substream,
aio->lrclk = rate;
if (!aio->is_slave)
ret = cygnus_ssp_set_clocks(aio, cygaud);
ret = cygnus_ssp_set_clocks(aio);
return ret;
}
......@@ -888,6 +764,11 @@ static int cygnus_ssp_startup(struct snd_pcm_substream *substream,
else
aio->clk_trace.cap_en = true;
substream->runtime->hw.rate_min = CYGNUS_RATE_MIN;
substream->runtime->hw.rate_max = CYGNUS_RATE_MAX;
snd_pcm_hw_constraint_list(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_RATE, &cygnus_rate_constraint);
return 0;
}
......@@ -1261,9 +1142,7 @@ static const struct snd_soc_dai_ops cygnus_ssp_dai_ops = {
.playback = { \
.channels_min = 1, \
.channels_max = 16, \
.rates = CYGNUS_TDM_RATE | SNDRV_PCM_RATE_88200 | \
SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
SNDRV_PCM_RATE_192000, \
.rates = SNDRV_PCM_RATE_KNOT, \
.formats = SNDRV_PCM_FMTBIT_S8 | \
SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S32_LE, \
......@@ -1271,9 +1150,7 @@ static const struct snd_soc_dai_ops cygnus_ssp_dai_ops = {
.capture = { \
.channels_min = 2, \
.channels_max = 16, \
.rates = CYGNUS_TDM_RATE | SNDRV_PCM_RATE_88200 | \
SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
SNDRV_PCM_RATE_192000, \
.rates = SNDRV_PCM_RATE_KNOT, \
.formats = SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S32_LE, \
}, \
......@@ -1293,9 +1170,7 @@ static const struct snd_soc_dai_driver cygnus_spdif_dai_info = {
.playback = {
.channels_min = 2,
.channels_max = 2,
.rates = CYGNUS_TDM_RATE | SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
SNDRV_PCM_RATE_192000,
.rates = SNDRV_PCM_RATE_KNOT,
.formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S32_LE,
},
......
......@@ -60,6 +60,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_CS4271_I2C if I2C
select SND_SOC_CS4271_SPI if SPI_MASTER
select SND_SOC_CS42XX8_I2C if I2C
select SND_SOC_CS43130 if I2C
select SND_SOC_CS4349 if I2C
select SND_SOC_CS47L24 if MFD_CS47L24
select SND_SOC_CS53L30 if I2C
......@@ -487,6 +488,11 @@ config SND_SOC_CS42XX8_I2C
select SND_SOC_CS42XX8
select REGMAP_I2C
# Cirrus Logic CS43130 HiFi DAC
config SND_SOC_CS43130
tristate "Cirrus Logic CS43130 CODEC"
depends on I2C
# Cirrus Logic CS4349 HiFi DAC
config SND_SOC_CS4349
tristate "Cirrus Logic CS4349 CODEC"
......
......@@ -53,6 +53,7 @@ snd-soc-cs4271-i2c-objs := cs4271-i2c.o
snd-soc-cs4271-spi-objs := cs4271-spi.o
snd-soc-cs42xx8-objs := cs42xx8.o
snd-soc-cs42xx8-i2c-objs := cs42xx8-i2c.o
snd-soc-cs43130-objs := cs43130.o
snd-soc-cs4349-objs := cs4349.o
snd-soc-cs47l24-objs := cs47l24.o
snd-soc-cs53l30-objs := cs53l30.o
......@@ -291,6 +292,7 @@ obj-$(CONFIG_SND_SOC_CS4271_I2C) += snd-soc-cs4271-i2c.o
obj-$(CONFIG_SND_SOC_CS4271_SPI) += snd-soc-cs4271-spi.o
obj-$(CONFIG_SND_SOC_CS42XX8) += snd-soc-cs42xx8.o
obj-$(CONFIG_SND_SOC_CS42XX8_I2C) += snd-soc-cs42xx8-i2c.o
obj-$(CONFIG_SND_SOC_CS43130) += snd-soc-cs43130.o
obj-$(CONFIG_SND_SOC_CS4349) += snd-soc-cs4349.o
obj-$(CONFIG_SND_SOC_CS47L24) += snd-soc-cs47l24.o
obj-$(CONFIG_SND_SOC_CS53L30) += snd-soc-cs53l30.o
......
This diff is collapsed.
This diff is collapsed.
......@@ -842,8 +842,7 @@ static int cs53l30_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{
struct cs53l30_private *priv = snd_soc_codec_get_drvdata(dai->codec);
if (priv->mute_gpio)
gpiod_set_value_cansleep(priv->mute_gpio, mute);
gpiod_set_value_cansleep(priv->mute_gpio, mute);
return 0;
}
......@@ -960,8 +959,7 @@ static int cs53l30_i2c_probe(struct i2c_client *client,
goto error;
}
if (cs53l30->reset_gpio)
gpiod_set_value_cansleep(cs53l30->reset_gpio, 1);
gpiod_set_value_cansleep(cs53l30->reset_gpio, 1);
i2c_set_clientdata(client, cs53l30);
......@@ -1056,8 +1054,7 @@ static int cs53l30_i2c_remove(struct i2c_client *client)
snd_soc_unregister_codec(&client->dev);
/* Hold down reset */
if (cs53l30->reset_gpio)
gpiod_set_value_cansleep(cs53l30->reset_gpio, 0);
gpiod_set_value_cansleep(cs53l30->reset_gpio, 0);
regulator_bulk_disable(ARRAY_SIZE(cs53l30->supplies),
cs53l30->supplies);
......@@ -1073,8 +1070,7 @@ static int cs53l30_runtime_suspend(struct device *dev)
regcache_cache_only(cs53l30->regmap, true);
/* Hold down reset */
if (cs53l30->reset_gpio)
gpiod_set_value_cansleep(cs53l30->reset_gpio, 0);
gpiod_set_value_cansleep(cs53l30->reset_gpio, 0);
regulator_bulk_disable(ARRAY_SIZE(cs53l30->supplies),
cs53l30->supplies);
......@@ -1094,8 +1090,7 @@ static int cs53l30_runtime_resume(struct device *dev)
return ret;
}
if (cs53l30->reset_gpio)
gpiod_set_value_cansleep(cs53l30->reset_gpio, 1);
gpiod_set_value_cansleep(cs53l30->reset_gpio, 1);
regcache_cache_only(cs53l30->regmap, false);
ret = regcache_sync(cs53l30->regmap);
......
......@@ -1602,8 +1602,6 @@ static struct davinci_mcasp_pdata *davinci_mcasp_set_pdata_from_of(
pdata = devm_kmemdup(&pdev->dev, match->data, sizeof(*pdata),
GFP_KERNEL);
if (!pdata) {
dev_err(&pdev->dev,
"Failed to allocate memory for pdata\n");
ret = -ENOMEM;
return pdata;
}
......@@ -1853,6 +1851,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
mcasp->context.xrsr_regs = devm_kzalloc(&pdev->dev,
sizeof(u32) * mcasp->num_serializer,
GFP_KERNEL);
if (!mcasp->context.xrsr_regs) {
ret = -ENOMEM;
goto err;
}
#endif
mcasp->serial_dir = pdata->serial_dir;
mcasp->version = pdata->version;
......
......@@ -210,11 +210,8 @@ static int davinci_vcif_probe(struct platform_device *pdev)
davinci_vcif_dev = devm_kzalloc(&pdev->dev,
sizeof(struct davinci_vcif_dev),
GFP_KERNEL);
if (!davinci_vcif_dev) {
dev_dbg(&pdev->dev,
"could not allocate memory for private data\n");
if (!davinci_vcif_dev)
return -ENOMEM;
}
/* DMA tx params */
davinci_vcif_dev->davinci_vc = davinci_vc;
......
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