Commit 3b723ae8 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Jason Cooper

arm: mvebu: PCIe Device Tree informations for Armada 370 DB

The Marvell evaluation board (DB) for the Armada 370 SoC has 2
physical full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 488d1a6f
......@@ -94,5 +94,22 @@ spi-flash@0 {
spi-max-frequency = <50000000>;
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* both standard PCIe slots and mini-PCIe
* slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
};
};
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