Commit 3b86bd07 authored by Sudarsana Reddy Kalluru's avatar Sudarsana Reddy Kalluru Committed by David S. Miller

qed: Add APIs for configuring grc dump config flags.

The patch adds driver support for configuring the grc dump config flags.
Signed-off-by: default avatarSudarsana Reddy Kalluru <skalluru@marvell.com>
Signed-off-by: default avatarAriel Elior <aelior@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d44a3ced
...@@ -1756,6 +1756,15 @@ static u32 qed_read_unaligned_dword(u8 *buf) ...@@ -1756,6 +1756,15 @@ static u32 qed_read_unaligned_dword(u8 *buf)
return dword; return dword;
} }
/* Sets the value of the specified GRC param */
static void qed_grc_set_param(struct qed_hwfn *p_hwfn,
enum dbg_grc_params grc_param, u32 val)
{
struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
dev_data->grc.param_val[grc_param] = val;
}
/* Returns the value of the specified GRC param */ /* Returns the value of the specified GRC param */
static u32 qed_grc_get_param(struct qed_hwfn *p_hwfn, static u32 qed_grc_get_param(struct qed_hwfn *p_hwfn,
enum dbg_grc_params grc_param) enum dbg_grc_params grc_param)
...@@ -5119,6 +5128,69 @@ bool qed_read_fw_info(struct qed_hwfn *p_hwfn, ...@@ -5119,6 +5128,69 @@ bool qed_read_fw_info(struct qed_hwfn *p_hwfn,
return false; return false;
} }
enum dbg_status qed_dbg_grc_config(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
enum dbg_grc_params grc_param, u32 val)
{
enum dbg_status status;
int i;
DP_VERBOSE(p_hwfn, QED_MSG_DEBUG,
"dbg_grc_config: paramId = %d, val = %d\n", grc_param, val);
status = qed_dbg_dev_init(p_hwfn, p_ptt);
if (status != DBG_STATUS_OK)
return status;
/* Initializes the GRC parameters (if not initialized). Needed in order
* to set the default parameter values for the first time.
*/
qed_dbg_grc_init_params(p_hwfn);
if (grc_param >= MAX_DBG_GRC_PARAMS)
return DBG_STATUS_INVALID_ARGS;
if (val < s_grc_param_defs[grc_param].min ||
val > s_grc_param_defs[grc_param].max)
return DBG_STATUS_INVALID_ARGS;
if (s_grc_param_defs[grc_param].is_preset) {
/* Preset param */
/* Disabling a preset is not allowed. Call
* dbg_grc_set_params_default instead.
*/
if (!val)
return DBG_STATUS_INVALID_ARGS;
/* Update all params with the preset values */
for (i = 0; i < MAX_DBG_GRC_PARAMS; i++) {
u32 preset_val;
/* Skip persistent params */
if (s_grc_param_defs[i].is_persistent)
continue;
/* Find preset value */
if (grc_param == DBG_GRC_PARAM_EXCLUDE_ALL)
preset_val =
s_grc_param_defs[i].exclude_all_preset_val;
else if (grc_param == DBG_GRC_PARAM_CRASH)
preset_val =
s_grc_param_defs[i].crash_preset_val;
else
return DBG_STATUS_INVALID_ARGS;
qed_grc_set_param(p_hwfn,
(enum dbg_grc_params)i, preset_val);
}
} else {
/* Regular param - set its value */
qed_grc_set_param(p_hwfn, grc_param, val);
}
return DBG_STATUS_OK;
}
/* Assign default GRC param values */ /* Assign default GRC param values */
void qed_dbg_grc_set_params_default(struct qed_hwfn *p_hwfn) void qed_dbg_grc_set_params_default(struct qed_hwfn *p_hwfn)
{ {
...@@ -7997,9 +8069,16 @@ static u32 qed_calc_regdump_header(enum debug_print_features feature, ...@@ -7997,9 +8069,16 @@ static u32 qed_calc_regdump_header(enum debug_print_features feature,
int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) int qed_dbg_all_data(struct qed_dev *cdev, void *buffer)
{ {
u8 cur_engine, omit_engine = 0, org_engine; u8 cur_engine, omit_engine = 0, org_engine;
struct qed_hwfn *p_hwfn =
&cdev->hwfns[cdev->dbg_params.engine_for_debug];
struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
int grc_params[MAX_DBG_GRC_PARAMS], i;
u32 offset = 0, feature_size; u32 offset = 0, feature_size;
int rc; int rc;
for (i = 0; i < MAX_DBG_GRC_PARAMS; i++)
grc_params[i] = dev_data->grc.param_val[i];
if (cdev->num_hwfns == 1) if (cdev->num_hwfns == 1)
omit_engine = 1; omit_engine = 1;
...@@ -8087,6 +8166,9 @@ int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) ...@@ -8087,6 +8166,9 @@ int qed_dbg_all_data(struct qed_dev *cdev, void *buffer)
rc); rc);
} }
for (i = 0; i < MAX_DBG_GRC_PARAMS; i++)
dev_data->grc.param_val[i] = grc_params[i];
/* GRC dump - must be last because when mcp stuck it will /* GRC dump - must be last because when mcp stuck it will
* clutter idle_chk, reg_fifo, ... * clutter idle_chk, reg_fifo, ...
*/ */
......
...@@ -3024,6 +3024,21 @@ void qed_read_regs(struct qed_hwfn *p_hwfn, ...@@ -3024,6 +3024,21 @@ void qed_read_regs(struct qed_hwfn *p_hwfn,
*/ */
bool qed_read_fw_info(struct qed_hwfn *p_hwfn, bool qed_read_fw_info(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt, struct fw_info *fw_info); struct qed_ptt *p_ptt, struct fw_info *fw_info);
/**
* @brief qed_dbg_grc_config - Sets the value of a GRC parameter.
*
* @param p_hwfn - HW device data
* @param grc_param - GRC parameter
* @param val - Value to set.
*
* @return error if one of the following holds:
* - the version wasn't set
* - grc_param is invalid
* - val is outside the allowed boundaries
*/
enum dbg_status qed_dbg_grc_config(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
enum dbg_grc_params grc_param, u32 val);
/** /**
* @brief qed_dbg_grc_set_params_default - Reverts all GRC parameters to their * @brief qed_dbg_grc_set_params_default - Reverts all GRC parameters to their
......
...@@ -2583,6 +2583,26 @@ static int qed_read_module_eeprom(struct qed_dev *cdev, char *buf, ...@@ -2583,6 +2583,26 @@ static int qed_read_module_eeprom(struct qed_dev *cdev, char *buf,
return rc; return rc;
} }
static int qed_set_grc_config(struct qed_dev *cdev, u32 cfg_id, u32 val)
{
struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
struct qed_ptt *ptt;
int rc = 0;
if (IS_VF(cdev))
return 0;
ptt = qed_ptt_acquire(hwfn);
if (!ptt)
return -EAGAIN;
rc = qed_dbg_grc_config(hwfn, ptt, cfg_id, val);
qed_ptt_release(hwfn, ptt);
return rc;
}
static u8 qed_get_affin_hwfn_idx(struct qed_dev *cdev) static u8 qed_get_affin_hwfn_idx(struct qed_dev *cdev)
{ {
return QED_AFFIN_HWFN_IDX(cdev); return QED_AFFIN_HWFN_IDX(cdev);
...@@ -2637,6 +2657,7 @@ const struct qed_common_ops qed_common_ops_pass = { ...@@ -2637,6 +2657,7 @@ const struct qed_common_ops qed_common_ops_pass = {
.read_module_eeprom = &qed_read_module_eeprom, .read_module_eeprom = &qed_read_module_eeprom,
.get_affin_hwfn_idx = &qed_get_affin_hwfn_idx, .get_affin_hwfn_idx = &qed_get_affin_hwfn_idx,
.read_nvm_cfg = &qed_nvm_flash_cfg_read, .read_nvm_cfg = &qed_nvm_flash_cfg_read,
.set_grc_config = &qed_set_grc_config,
}; };
void qed_get_protocol_stats(struct qed_dev *cdev, void qed_get_protocol_stats(struct qed_dev *cdev,
......
...@@ -1143,6 +1143,15 @@ struct qed_common_ops { ...@@ -1143,6 +1143,15 @@ struct qed_common_ops {
*/ */
int (*read_nvm_cfg)(struct qed_dev *cdev, u8 **buf, u32 cmd, int (*read_nvm_cfg)(struct qed_dev *cdev, u8 **buf, u32 cmd,
u32 entity_id); u32 entity_id);
/**
* @brief set_grc_config - Configure value for grc config id.
* @param cdev
* @param cfg_id - grc config id
* @param val - grc config value
*
*/
int (*set_grc_config)(struct qed_dev *cdev, u32 cfg_id, u32 val);
}; };
#define MASK_FIELD(_name, _value) \ #define MASK_FIELD(_name, _value) \
......
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