Commit 3ba5caf3 authored by Marc Kleine-Budde's avatar Marc Kleine-Budde

Merge patch series "can: kvaser_pciefd: Support MSI interrupts"

Martin Jocic <martin.jocic@kvaser.com> says:

This patch series adds support for MSI interrupts. It depends on the
patch series can: kvaser_pciefd: Minor improvements and cleanups.

Link: https://lore.kernel.org/all/20240620181320.235465-1-martin.jocic@kvaser.comSigned-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parents 024452fd dd1f05ba
...@@ -1640,23 +1640,15 @@ static int kvaser_pciefd_read_buffer(struct kvaser_pciefd *pcie, int dma_buf) ...@@ -1640,23 +1640,15 @@ static int kvaser_pciefd_read_buffer(struct kvaser_pciefd *pcie, int dma_buf)
return res; return res;
} }
static void kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie) static u32 kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie)
{ {
u32 irq = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG); u32 irq = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);
if (irq & KVASER_PCIEFD_SRB_IRQ_DPD0) { if (irq & KVASER_PCIEFD_SRB_IRQ_DPD0)
kvaser_pciefd_read_buffer(pcie, 0); kvaser_pciefd_read_buffer(pcie, 0);
/* Reset DMA buffer 0 */
iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0,
KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);
}
if (irq & KVASER_PCIEFD_SRB_IRQ_DPD1) { if (irq & KVASER_PCIEFD_SRB_IRQ_DPD1)
kvaser_pciefd_read_buffer(pcie, 1); kvaser_pciefd_read_buffer(pcie, 1);
/* Reset DMA buffer 1 */
iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1,
KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);
}
if (unlikely(irq & KVASER_PCIEFD_SRB_IRQ_DOF0 || if (unlikely(irq & KVASER_PCIEFD_SRB_IRQ_DOF0 ||
irq & KVASER_PCIEFD_SRB_IRQ_DOF1 || irq & KVASER_PCIEFD_SRB_IRQ_DOF1 ||
...@@ -1665,6 +1657,7 @@ static void kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie) ...@@ -1665,6 +1657,7 @@ static void kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie)
dev_err(&pcie->pci->dev, "DMA IRQ error 0x%08X\n", irq); dev_err(&pcie->pci->dev, "DMA IRQ error 0x%08X\n", irq);
iowrite32(irq, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG); iowrite32(irq, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);
return irq;
} }
static void kvaser_pciefd_transmit_irq(struct kvaser_pciefd_can *can) static void kvaser_pciefd_transmit_irq(struct kvaser_pciefd_can *can)
...@@ -1692,19 +1685,32 @@ static irqreturn_t kvaser_pciefd_irq_handler(int irq, void *dev) ...@@ -1692,19 +1685,32 @@ static irqreturn_t kvaser_pciefd_irq_handler(int irq, void *dev)
struct kvaser_pciefd *pcie = (struct kvaser_pciefd *)dev; struct kvaser_pciefd *pcie = (struct kvaser_pciefd *)dev;
const struct kvaser_pciefd_irq_mask *irq_mask = pcie->driver_data->irq_mask; const struct kvaser_pciefd_irq_mask *irq_mask = pcie->driver_data->irq_mask;
u32 pci_irq = ioread32(KVASER_PCIEFD_PCI_IRQ_ADDR(pcie)); u32 pci_irq = ioread32(KVASER_PCIEFD_PCI_IRQ_ADDR(pcie));
u32 srb_irq = 0;
int i; int i;
if (!(pci_irq & irq_mask->all)) if (!(pci_irq & irq_mask->all))
return IRQ_NONE; return IRQ_NONE;
if (pci_irq & irq_mask->kcan_rx0) if (pci_irq & irq_mask->kcan_rx0)
kvaser_pciefd_receive_irq(pcie); srb_irq = kvaser_pciefd_receive_irq(pcie);
for (i = 0; i < pcie->nr_channels; i++) { for (i = 0; i < pcie->nr_channels; i++) {
if (pci_irq & irq_mask->kcan_tx[i]) if (pci_irq & irq_mask->kcan_tx[i])
kvaser_pciefd_transmit_irq(pcie->can[i]); kvaser_pciefd_transmit_irq(pcie->can[i]);
} }
if (srb_irq & KVASER_PCIEFD_SRB_IRQ_DPD0) {
/* Reset DMA buffer 0, may trigger new interrupt */
iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0,
KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);
}
if (srb_irq & KVASER_PCIEFD_SRB_IRQ_DPD1) {
/* Reset DMA buffer 1, may trigger new interrupt */
iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1,
KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);
}
return IRQ_HANDLED; return IRQ_HANDLED;
} }
...@@ -1768,11 +1774,24 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev, ...@@ -1768,11 +1774,24 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,
if (ret) if (ret)
goto err_teardown_can_ctrls; goto err_teardown_can_ctrls;
ret = request_irq(pcie->pci->irq, kvaser_pciefd_irq_handler, ret = pci_alloc_irq_vectors(pcie->pci, 1, 1, PCI_IRQ_INTX | PCI_IRQ_MSI);
IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie); if (ret < 0) {
if (ret) dev_err(&pcie->pci->dev, "Failed to allocate IRQ vectors.\n");
goto err_teardown_can_ctrls; goto err_teardown_can_ctrls;
}
ret = pci_irq_vector(pcie->pci, 0);
if (ret < 0)
goto err_pci_free_irq_vectors;
pcie->pci->irq = ret;
ret = request_irq(pcie->pci->irq, kvaser_pciefd_irq_handler,
IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie);
if (ret) {
dev_err(&pcie->pci->dev, "Failed to request IRQ %d\n", pcie->pci->irq);
goto err_pci_free_irq_vectors;
}
iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1, iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1,
KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG); KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);
...@@ -1801,6 +1820,9 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev, ...@@ -1801,6 +1820,9 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,
iowrite32(0, irq_en_base); iowrite32(0, irq_en_base);
free_irq(pcie->pci->irq, pcie); free_irq(pcie->pci->irq, pcie);
err_pci_free_irq_vectors:
pci_free_irq_vectors(pcie->pci);
err_teardown_can_ctrls: err_teardown_can_ctrls:
kvaser_pciefd_teardown_can_ctrls(pcie); kvaser_pciefd_teardown_can_ctrls(pcie);
iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG); iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);
...@@ -1846,7 +1868,7 @@ static void kvaser_pciefd_remove(struct pci_dev *pdev) ...@@ -1846,7 +1868,7 @@ static void kvaser_pciefd_remove(struct pci_dev *pdev)
iowrite32(0, KVASER_PCIEFD_PCI_IEN_ADDR(pcie)); iowrite32(0, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));
free_irq(pcie->pci->irq, pcie); free_irq(pcie->pci->irq, pcie);
pci_free_irq_vectors(pcie->pci);
pci_iounmap(pdev, pcie->reg_base); pci_iounmap(pdev, pcie->reg_base);
pci_release_regions(pdev); pci_release_regions(pdev);
pci_disable_device(pdev); pci_disable_device(pdev);
......
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