Commit 3bb350f2 authored by Yoshihiro Kaneko's avatar Yoshihiro Kaneko Committed by Geert Uytterhoeven

arm64: dts: renesas: r8a7795-es1: Sort nodes

Sort nodes.

If node address is present
   * Sort by node address, grouping all nodes with the same compat string
     and sorting the group alphabetically.
Else
   * Sort alphabetically

This should not have any run-time effect.
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent c7a895fc
...@@ -7,22 +7,75 @@ ...@@ -7,22 +7,75 @@
#include "r8a7795.dtsi" #include "r8a7795.dtsi"
&soc { &audma0 {
xhci1: usb@ee040000 { iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
reg = <0 0xee040000 0 0xc00>; <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
clocks = <&cpg CPG_MOD 327>; <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
resets = <&cpg 327>; <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
status = "disabled"; <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
}; };
/delete-node/ mmu@febe0000; &audma1 {
/delete-node/ mmu@fe980000; iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
/delete-node/ mmu@fd950000; <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
/delete-node/ mmu@fd960000; <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
/delete-node/ mmu@fd970000; <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
<&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
<&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
<&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
<&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
};
&du {
vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
};
&fcpvb1 {
iommus = <&ipmmu_vp0 7>;
};
&fcpf1 {
iommus = <&ipmmu_vp0 1>;
};
&fcpvi1 {
iommus = <&ipmmu_vp0 9>;
};
&fcpvd2 {
iommus = <&ipmmu_vi0 10>;
};
&gpio1 {
gpio-ranges = <&pfc 0 32 28>;
};
&ipmmu_vi0 {
renesas,ipmmu-main = <&ipmmu_mm 11>;
};
&ipmmu_vp0 {
renesas,ipmmu-main = <&ipmmu_mm 12>;
};
&ipmmu_vc0 {
renesas,ipmmu-main = <&ipmmu_mm 9>;
};
&ipmmu_vc1 {
renesas,ipmmu-main = <&ipmmu_mm 10>;
};
&ipmmu_rt {
renesas,ipmmu-main = <&ipmmu_mm 7>;
};
&soc {
/delete-node/ dma-controller@e6460000;
/delete-node/ dma-controller@e6470000;
ipmmu_mp1: mmu@ec680000 { ipmmu_mp1: mmu@ec680000 {
compatible = "renesas,ipmmu-r8a7795"; compatible = "renesas,ipmmu-r8a7795";
...@@ -40,13 +93,37 @@ ipmmu_sy: mmu@e7730000 { ...@@ -40,13 +93,37 @@ ipmmu_sy: mmu@e7730000 {
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
/delete-node/ usb-phy@ee0e0200; /delete-node/ mmu@fd950000;
/delete-node/ usb@ee0e0100; /delete-node/ mmu@fd960000;
/delete-node/ usb@ee0e0000; /delete-node/ mmu@fd970000;
/delete-node/ mmu@febe0000;
/delete-node/ mmu@fe980000;
xhci1: usb@ee040000 {
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee040000 0 0xc00>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 327>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 327>;
status = "disabled";
};
/delete-node/ usb@e659c000; /delete-node/ usb@e659c000;
/delete-node/ usb@ee0e0000;
/delete-node/ usb@ee0e0100;
/delete-node/ dma-controller@e6460000; /delete-node/ usb-phy@ee0e0200;
/delete-node/ dma-controller@e6470000;
fdp1@fe948000 {
compatible = "renesas,fdp1";
reg = <0 0xfe948000 0 0x2400>;
interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 117>;
power-domains = <&sysc R8A7795_PD_A3VP>;
resets = <&cpg 117>;
renesas,fcp = <&fcpf2>;
};
fcpf2: fcp@fe952000 { fcpf2: fcp@fe952000 {
compatible = "renesas,fcpf"; compatible = "renesas,fcpf";
...@@ -57,15 +134,13 @@ fcpf2: fcp@fe952000 { ...@@ -57,15 +134,13 @@ fcpf2: fcp@fe952000 {
iommus = <&ipmmu_vp0 2>; iommus = <&ipmmu_vp0 2>;
}; };
vspi2: vsp@fe9c0000 { fcpvd3: fcp@fea3f000 {
compatible = "renesas,vsp2"; compatible = "renesas,fcpv";
reg = <0 0xfe9c0000 0 0x8000>; reg = <0 0xfea3f000 0 0x200>;
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 600>;
clocks = <&cpg CPG_MOD 629>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7795_PD_A3VP>; resets = <&cpg 600>;
resets = <&cpg 629>; iommus = <&ipmmu_vi0 11>;
renesas,fcp = <&fcpvi2>;
}; };
fcpvi2: fcp@fe9cf000 { fcpvi2: fcp@fe9cf000 {
...@@ -88,23 +163,15 @@ vspd3: vsp@fea38000 { ...@@ -88,23 +163,15 @@ vspd3: vsp@fea38000 {
renesas,fcp = <&fcpvd3>; renesas,fcp = <&fcpvd3>;
}; };
fcpvd3: fcp@fea3f000 { vspi2: vsp@fe9c0000 {
compatible = "renesas,fcpv"; compatible = "renesas,vsp2";
reg = <0 0xfea3f000 0 0x200>; reg = <0 0xfe9c0000 0 0x8000>;
clocks = <&cpg CPG_MOD 600>; interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 629>;
resets = <&cpg 600>;
iommus = <&ipmmu_vi0 11>;
};
fdp1@fe948000 {
compatible = "renesas,fdp1";
reg = <0 0xfe948000 0 0x2400>;
interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 117>;
power-domains = <&sysc R8A7795_PD_A3VP>; power-domains = <&sysc R8A7795_PD_A3VP>;
resets = <&cpg 117>; resets = <&cpg 629>;
renesas,fcp = <&fcpf2>;
renesas,fcp = <&fcpvi2>;
}; };
csi21: csi2@fea90000 { csi21: csi2@fea90000 {
...@@ -163,72 +230,6 @@ csi21vin7: endpoint@7 { ...@@ -163,72 +230,6 @@ csi21vin7: endpoint@7 {
}; };
}; };
&gpio1 {
gpio-ranges = <&pfc 0 32 28>;
};
&ipmmu_vi0 {
renesas,ipmmu-main = <&ipmmu_mm 11>;
};
&ipmmu_vp0 {
renesas,ipmmu-main = <&ipmmu_mm 12>;
};
&ipmmu_vc0 {
renesas,ipmmu-main = <&ipmmu_mm 9>;
};
&ipmmu_vc1 {
renesas,ipmmu-main = <&ipmmu_mm 10>;
};
&ipmmu_rt {
renesas,ipmmu-main = <&ipmmu_mm 7>;
};
&audma0 {
iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
<&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
<&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
<&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
<&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
<&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
<&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
<&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
};
&audma1 {
iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
<&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
<&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
<&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
<&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
<&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
<&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
<&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
};
&fcpvb1 {
iommus = <&ipmmu_vp0 7>;
};
&fcpf1 {
iommus = <&ipmmu_vp0 1>;
};
&fcpvi1 {
iommus = <&ipmmu_vp0 9>;
};
&fcpvd2 {
iommus = <&ipmmu_vi0 10>;
};
&du {
vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
};
&vin0 { &vin0 {
ports { ports {
port@1 { port@1 {
......
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