Commit 3c0e3abd authored by Orson Zhai's avatar Orson Zhai Committed by Arnd Bergmann

arm64: dts: Add basic DT to support Spreadtrum's SP9860G

SC9860G is a 8 cores of A53 SoC with 4G LTE support SoC from Spreadtrum.

According to regular hierarchy of sprd dts, whale2.dtsi contains SoC
peripherals IP nodes, sc9860.dtsi contains stuff related to ARM core stuff
and sp9860g dts is for the board level.
Signed-off-by: default avatarOrson Zhai <orson.zhai@spreadtrum.com>
Signed-off-by: default avatarChunyan Zhang <chunyan.zhang@spreadtrum.com>
Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 052bc8fc
dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb \
sp9860g-1h10.dtb
always := $(dtb-y) always := $(dtb-y)
subdir-y := $(dts-dirs) subdir-y := $(dts-dirs)
......
This diff is collapsed.
/*
* Spreadtrum SP9860g board
*
* Copyright (C) 2017, Spreadtrum Communications Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
#include "sc9860.dtsi"
/ {
model = "Spreadtrum SP9860G 3GFHD Board";
compatible = "sprd,sp9860g-1h10", "sprd,sc9860";
aliases {
serial0 = &uart0; /* for Bluetooth */
serial1 = &uart1; /* UART console */
serial2 = &uart2; /* Reserved */
serial3 = &uart3; /* for GPS */
};
memory{
device_type = "memory";
reg = <0x0 0x80000000 0 0x60000000>,
<0x1 0x80000000 0 0x60000000>;
};
chosen {
stdout-path = "serial1:115200n8";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
/*
* Spreadtrum Whale2 platform peripherals
*
* Copyright (C) 2016, Spreadtrum Communications Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
soc: soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
ap-apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x70000000 0x10000000>;
uart0: serial@0 {
compatible = "sprd,sc9860-uart",
"sprd,sc9836-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ext_26m>;
status = "disabled";
};
uart1: serial@100000 {
compatible = "sprd,sc9860-uart",
"sprd,sc9836-uart";
reg = <0x100000 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ext_26m>;
status = "disabled";
};
uart2: serial@200000 {
compatible = "sprd,sc9860-uart",
"sprd,sc9836-uart";
reg = <0x200000 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ext_26m>;
status = "disabled";
};
uart3: serial@300000 {
compatible = "sprd,sc9860-uart",
"sprd,sc9836-uart";
reg = <0x300000 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ext_26m>;
status = "disabled";
};
};
};
ext_26m: ext-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
clock-output-names = "ext_26m";
};
};
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