Commit 3c1b8438 authored by Lee Jones's avatar Lee Jones Committed by Mark Brown

ARM: ux500: regulators: Add mask for configuration

There is already before a register mask in the regulator driver
to allow some bits of a register to be initialized. The register
value is defined in the board configuration. This patch puts a
mask in the board configuration to specify which bits should
actually be altered. The purpose with this patch is to avoid
future mistakes when updating the allowed bits in the regulator
driver.
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 7ce4669c
...@@ -129,19 +129,19 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -129,19 +129,19 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* VpllRequestCtrl = HP/LP depending on VxRequest * VpllRequestCtrl = HP/LP depending on VxRequest
* VextSupply1RequestCtrl = HP/LP depending on VxRequest * VextSupply1RequestCtrl = HP/LP depending on VxRequest
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xfc, 0x00),
/* /*
* VextSupply2RequestCtrl = HP/LP depending on VxRequest * VextSupply2RequestCtrl = HP/LP depending on VxRequest
* VextSupply3RequestCtrl = HP/LP depending on VxRequest * VextSupply3RequestCtrl = HP/LP depending on VxRequest
* Vaux1RequestCtrl = HP/LP depending on VxRequest * Vaux1RequestCtrl = HP/LP depending on VxRequest
* Vaux2RequestCtrl = HP/LP depending on VxRequest * Vaux2RequestCtrl = HP/LP depending on VxRequest
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00),
/* /*
* Vaux3RequestCtrl = HP/LP depending on VxRequest * Vaux3RequestCtrl = HP/LP depending on VxRequest
* SwHPReq = Control through SWValid disabled * SwHPReq = Control through SWValid disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
/* /*
* Vsmps1SysClkReq1HPValid = enabled * Vsmps1SysClkReq1HPValid = enabled
* Vsmps2SysClkReq1HPValid = enabled * Vsmps2SysClkReq1HPValid = enabled
...@@ -152,44 +152,44 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -152,44 +152,44 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* Vaux2SysClkReq1HPValid = disabled * Vaux2SysClkReq1HPValid = disabled
* Vaux3SysClkReq1HPValid = disabled * Vaux3SysClkReq1HPValid = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x17), INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xff, 0x17),
/* /*
* VextSupply1SysClkReq1HPValid = disabled * VextSupply1SysClkReq1HPValid = disabled
* VextSupply2SysClkReq1HPValid = disabled * VextSupply2SysClkReq1HPValid = disabled
* VextSupply3SysClkReq1HPValid = SysClkReq1 controlled * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40), INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
/* /*
* VanaHwHPReq1Valid = disabled * VanaHwHPReq1Valid = disabled
* Vaux1HwHPreq1Valid = disabled * Vaux1HwHPreq1Valid = disabled
* Vaux2HwHPReq1Valid = disabled * Vaux2HwHPReq1Valid = disabled
* Vaux3HwHPReqValid = disabled * Vaux3HwHPReqValid = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00),
/* /*
* VextSupply1HwHPReq1Valid = disabled * VextSupply1HwHPReq1Valid = disabled
* VextSupply2HwHPReq1Valid = disabled * VextSupply2HwHPReq1Valid = disabled
* VextSupply3HwHPReq1Valid = disabled * VextSupply3HwHPReq1Valid = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00),
/* /*
* VanaHwHPReq2Valid = disabled * VanaHwHPReq2Valid = disabled
* Vaux1HwHPReq2Valid = disabled * Vaux1HwHPReq2Valid = disabled
* Vaux2HwHPReq2Valid = disabled * Vaux2HwHPReq2Valid = disabled
* Vaux3HwHPReq2Valid = disabled * Vaux3HwHPReq2Valid = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00),
/* /*
* VextSupply1HwHPReq2Valid = disabled * VextSupply1HwHPReq2Valid = disabled
* VextSupply2HwHPReq2Valid = disabled * VextSupply2HwHPReq2Valid = disabled
* VextSupply3HwHPReq2Valid = HWReq2 controlled * VextSupply3HwHPReq2Valid = HWReq2 controlled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04), INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04),
/* /*
* VanaSwHPReqValid = disabled * VanaSwHPReqValid = disabled
* Vaux1SwHPReqValid = disabled * Vaux1SwHPReqValid = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00),
/* /*
* Vaux2SwHPReqValid = disabled * Vaux2SwHPReqValid = disabled
* Vaux3SwHPReqValid = disabled * Vaux3SwHPReqValid = disabled
...@@ -197,7 +197,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -197,7 +197,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* VextSupply2SwHPReqValid = disabled * VextSupply2SwHPReqValid = disabled
* VextSupply3SwHPReqValid = disabled * VextSupply3SwHPReqValid = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00),
/* /*
* SysClkReq2Valid1 = SysClkReq2 controlled * SysClkReq2Valid1 = SysClkReq2 controlled
* SysClkReq3Valid1 = disabled * SysClkReq3Valid1 = disabled
...@@ -207,7 +207,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -207,7 +207,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* SysClkReq7Valid1 = disabled * SysClkReq7Valid1 = disabled
* SysClkReq8Valid1 = disabled * SysClkReq8Valid1 = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a), INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a),
/* /*
* SysClkReq2Valid2 = disabled * SysClkReq2Valid2 = disabled
* SysClkReq3Valid2 = disabled * SysClkReq3Valid2 = disabled
...@@ -217,7 +217,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -217,7 +217,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* SysClkReq7Valid2 = disabled * SysClkReq7Valid2 = disabled
* SysClkReq8Valid2 = disabled * SysClkReq8Valid2 = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20), INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20),
/* /*
* VTVoutEna = disabled * VTVoutEna = disabled
* Vintcore12Ena = disabled * Vintcore12Ena = disabled
...@@ -225,57 +225,57 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -225,57 +225,57 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* Vintcore12LP = inactive (HP) * Vintcore12LP = inactive (HP)
* VTVoutLP = inactive (HP) * VTVoutLP = inactive (HP)
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10), INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10),
/* /*
* VaudioEna = disabled * VaudioEna = disabled
* VdmicEna = disabled * VdmicEna = disabled
* Vamic1Ena = disabled * Vamic1Ena = disabled
* Vamic2Ena = disabled * Vamic2Ena = disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00), INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00),
/* /*
* Vamic1_dzout = high-Z when Vamic1 is disabled * Vamic1_dzout = high-Z when Vamic1 is disabled
* Vamic2_dzout = high-Z when Vamic2 is disabled * Vamic2_dzout = high-Z when Vamic2 is disabled
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
/* /*
* VBBN = force OFF * VBBN = force OFF
* VBBP = force OFF * VBBP = force OFF
* NOTE! PRCMU register * NOTE! PRCMU register
*/ */
INIT_REGULATOR_REGISTER(AB8500_ARMREGU2, 0x00), INIT_REGULATOR_REGISTER(AB8500_ARMREGU2, 0x0f, 0x00),
/* /*
* VBBNSel1 = VBBP = VBBPFB * VBBNSel1 = VBBP = VBBPFB
* VBBPSel1 = 0 V * VBBPSel1 = 0 V
* NOTE! PRCMU register * NOTE! PRCMU register
*/ */
INIT_REGULATOR_REGISTER(AB8500_VBBSEL1, 0x00), INIT_REGULATOR_REGISTER(AB8500_VBBSEL1, 0x0f, 0x00),
/* /*
* VBBNSel2 = VBBP = VBBPFB * VBBNSel2 = VBBP = VBBPFB
* VBBPSel2 = 0 V * VBBPSel2 = 0 V
* NOTE! PRCMU register * NOTE! PRCMU register
*/ */
INIT_REGULATOR_REGISTER(AB8500_VBBSEL2, 0x00), INIT_REGULATOR_REGISTER(AB8500_VBBSEL2, 0x0f, 0x00),
/* /*
* Vsmps1Regu = HW control * Vsmps1Regu = HW control
* Vsmps1SelCtrl = Vsmps1 voltage defined by Vsmsp1Sel2 * Vsmps1SelCtrl = Vsmps1 voltage defined by Vsmsp1Sel2
*/ */
INIT_REGULATOR_REGISTER(AB8500_VSMPS1REGU, 0x06), INIT_REGULATOR_REGISTER(AB8500_VSMPS1REGU, 0x0f, 0x06),
/* /*
* Vsmps2Regu = HW control * Vsmps2Regu = HW control
* Vsmps2SelCtrl = Vsmps2 voltage defined by Vsmsp2Sel2 * Vsmps2SelCtrl = Vsmps2 voltage defined by Vsmsp2Sel2
*/ */
INIT_REGULATOR_REGISTER(AB8500_VSMPS2REGU, 0x06), INIT_REGULATOR_REGISTER(AB8500_VSMPS2REGU, 0x0f, 0x06),
/* /*
* VPll = Hw controlled * VPll = Hw controlled
* VanaRegu = force off * VanaRegu = force off
*/ */
INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02), INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
/* /*
* VrefDDREna = disabled * VrefDDREna = disabled
* VrefDDRSleepMode = inactive (no pulldown) * VrefDDRSleepMode = inactive (no pulldown)
*/ */
INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00), INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00),
/* /*
* VextSupply1Regu = HW control * VextSupply1Regu = HW control
* VextSupply2Regu = HW control * VextSupply2Regu = HW control
...@@ -283,37 +283,37 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -283,37 +283,37 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
* ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
*/ */
INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a), INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x1a),
/* /*
* Vaux1Regu = force HP * Vaux1Regu = force HP
* Vaux2Regu = force off * Vaux2Regu = force off
*/ */
INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01), INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
/* /*
* Vrf1Regu = HW control * Vrf1Regu = HW control
* Vaux3Regu = force off * Vaux3Regu = force off
*/ */
INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x08), INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x0f, 0x08),
/* /*
* Vsmps1 = 1.15V * Vsmps1 = 1.15V
*/ */
INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24), INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x3f, 0x24),
/* /*
* Vaux1Sel = 2.5 V * Vaux1Sel = 2.5 V
*/ */
INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08), INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x08),
/* /*
* Vaux2Sel = 2.9 V * Vaux2Sel = 2.9 V
*/ */
INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d), INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d),
/* /*
* Vaux3Sel = 2.91 V * Vaux3Sel = 2.91 V
*/ */
INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07), INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07),
/* /*
* VextSupply12LP = disabled (no LP) * VextSupply12LP = disabled (no LP)
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00),
/* /*
* Vaux1Disch = short discharge time * Vaux1Disch = short discharge time
* Vaux2Disch = short discharge time * Vaux2Disch = short discharge time
...@@ -322,13 +322,13 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = { ...@@ -322,13 +322,13 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
* VTVoutDisch = short discharge time * VTVoutDisch = short discharge time
* VaudioDisch = short discharge time * VaudioDisch = short discharge time
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00),
/* /*
* VanaDisch = short discharge time * VanaDisch = short discharge time
* VdmicPullDownEna = pulldown disabled when Vdmic is disabled * VdmicPullDownEna = pulldown disabled when Vdmic is disabled
* VdmicDisch = short discharge time * VdmicDisch = short discharge time
*/ */
INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00), INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00),
}; };
/* AB8500 regulators */ /* AB8500 regulators */
......
...@@ -811,23 +811,20 @@ static struct ab8500_reg_init ab8500_reg_init[] = { ...@@ -811,23 +811,20 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16), REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
}; };
static int static int ab8500_regulator_init_registers(struct platform_device *pdev,
ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value) int id, int mask, int value)
{ {
int err; int err;
if (value & ~ab8500_reg_init[id].mask) { BUG_ON(value & ~mask);
dev_err(&pdev->dev, BUG_ON(mask & ~ab8500_reg_init[id].mask);
"Configuration error: value outside mask.\n");
return -EINVAL;
}
/* initialize register */
err = abx500_mask_and_set_register_interruptible( err = abx500_mask_and_set_register_interruptible(
&pdev->dev, &pdev->dev,
ab8500_reg_init[id].bank, ab8500_reg_init[id].bank,
ab8500_reg_init[id].addr, ab8500_reg_init[id].addr,
ab8500_reg_init[id].mask, mask, value);
value);
if (err < 0) { if (err < 0) {
dev_err(&pdev->dev, dev_err(&pdev->dev,
"Failed to initialize 0x%02x, 0x%02x.\n", "Failed to initialize 0x%02x, 0x%02x.\n",
...@@ -835,13 +832,11 @@ ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value) ...@@ -835,13 +832,11 @@ ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value)
ab8500_reg_init[id].addr); ab8500_reg_init[id].addr);
return err; return err;
} }
dev_vdbg(&pdev->dev, dev_vdbg(&pdev->dev,
"init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
ab8500_reg_init[id].bank, ab8500_reg_init[id].bank,
ab8500_reg_init[id].addr, ab8500_reg_init[id].addr,
ab8500_reg_init[id].mask, mask, value);
value);
return 0; return 0;
} }
...@@ -960,19 +955,16 @@ static int ab8500_regulator_probe(struct platform_device *pdev) ...@@ -960,19 +955,16 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
/* initialize registers */ /* initialize registers */
for (i = 0; i < pdata->num_regulator_reg_init; i++) { for (i = 0; i < pdata->num_regulator_reg_init; i++) {
int id, value; int id, mask, value;
id = pdata->regulator_reg_init[i].id; id = pdata->regulator_reg_init[i].id;
mask = pdata->regulator_reg_init[i].mask;
value = pdata->regulator_reg_init[i].value; value = pdata->regulator_reg_init[i].value;
/* check for configuration errors */ /* check for configuration errors */
if (id >= AB8500_NUM_REGULATOR_REGISTERS) { BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
dev_err(&pdev->dev,
"Configuration error: id outside range.\n");
return -EINVAL;
}
err = ab8500_regulator_init_registers(pdev, id, value); err = ab8500_regulator_init_registers(pdev, id, mask, value);
if (err < 0) if (err < 0)
return err; return err;
} }
......
...@@ -48,13 +48,15 @@ enum ab9540_regulator_id { ...@@ -48,13 +48,15 @@ enum ab9540_regulator_id {
/* AB8500 and AB9540 register initialization */ /* AB8500 and AB9540 register initialization */
struct ab8500_regulator_reg_init { struct ab8500_regulator_reg_init {
int id; int id;
u8 mask;
u8 value; u8 value;
}; };
#define INIT_REGULATOR_REGISTER(_id, _value) \ #define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
{ \ { \
.id = _id, \ .id = _id, \
.value = _value, \ .mask = _mask, \
.value = _value, \
} }
/* AB8500 registers */ /* AB8500 registers */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment