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Commit 3cb06b30 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'sti-dt-for-v4.4-1' of... 

Merge tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt

Merge "STi DT changes for v4.4, round 1" from Maxime Coquelin:

Highlights:
-----------
 - Add multiple pinctrl configurations to STiH407
 - Enable devices using pins only at board level
 - Add HW RNG device nodes to STiH407 family
 - Fix MMC0 clock configuration on STiH418
 - Fix interrupt related bindings on STiH407

* tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
  ARM: STi: STiH407: Enable the 2 HW Random Number Generators for STiH4{07, 10}
  ARM: DT: STi: STiH418: Fix mmc0 clock configuration
  ARM: STi: DT: STiH407: Rename incorrect interrupt related binding
  ARM: STi: STiH407: Add spi default pinctrl groups.
  ARM: DT: STiH407: Add RMII pinctrl support
  ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX
  ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller
  ARM: DT: STiH407: Add systrace pin configuration
  ARM: DT: STiH407: Add NAND flash controller pin configuration
  ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config
  ARM: DT: STiH407: Add serial3 pinctrl configuration
  ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs
  ARM: STi: DT: STiH407: Add i2c3 alternate pin configs
  ARM: STi: DT: STiH407: Add a cec0 pin definition
  ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level
  ARM: dts: stih407/410: Tidy up display nodes
  ARM: dts: stih407: Enable PWM nodes only board level
parents f85e64b5 cae010a1
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Showing with 471 additions and 36 deletions
arch/arm/boot/dts/stih407-family.dtsi
View file @ 3cb06b30
......@@ -152,6 +152,19 @@ irq-syscfg {
<ST_IRQ_SYSCFG_DISABLED>;
};
/* Display */
vtg_main: sti-vtg-main@8d02800 {
compatible = "st,vtg";
reg = <0x8d02800 0x200>;
interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
};
vtg_aux: sti-vtg-aux@8d00200 {
compatible = "st,vtg";
reg = <0x8d00200 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
};
serial@9830000 {
compatible = "st,asc";
reg = <0x9830000 0x2c>;
......@@ -396,6 +409,8 @@ spi@9841000 {
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
status = "disabled";
};
......@@ -406,6 +421,8 @@ spi@9842000 {
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2_default>;
status = "disabled";
};
......@@ -416,6 +433,8 @@ spi@9843000 {
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi3_default>;
status = "disabled";
};
......@@ -426,6 +445,8 @@ spi@9844000 {
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4_default>;
status = "disabled";
};
......@@ -437,6 +458,8 @@ spi@9540000 {
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi10_default>;
status = "disabled";
};
......@@ -447,6 +470,8 @@ spi@9541000 {
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi11_default>;
status = "disabled";
};
......@@ -457,6 +482,8 @@ spi@9542000 {
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi12_default>;
status = "disabled";
};
......@@ -585,7 +612,6 @@ dwc3: dwc3@9900000 {
/* COMMS PWM Module */
pwm0: pwm@9810000 {
compatible = "st,sti-pwm";
status = "okay";
#pwm-cells = <2>;
reg = <0x9810000 0x68>;
pinctrl-names = "default";
......@@ -593,12 +619,13 @@ pwm0: pwm@9810000 {
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <1>;
status = "disabled";
};
/* SBC PWM Module */
pwm1: pwm@9510000 {
compatible = "st,sti-pwm";
status = "okay";
#pwm-cells = <2>;
reg = <0x9510000 0x68>;
pinctrl-names = "default";
......@@ -609,6 +636,22 @@ &pinctrl_pwm1_chan2_default
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <4>;
status = "disabled";
};
rng10: rng@08a89000 {
compatible = "st,rng";
reg = <0x08a89000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
};
rng11: rng@08a8a000 {
compatible = "st,rng";
reg = <0x08a8a000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
};
};
};
arch/arm/boot/dts/stih407-pinctrl.dtsi
View file @ 3cb06b30
This diff is collapsed.
arch/arm/boot/dts/stih407.dtsi
View file @ 3cb06b30
......@@ -10,19 +10,6 @@
#include "stih407-family.dtsi"
/ {
soc {
/* Display */
vtg_main: sti-vtg-main@8d02800 {
compatible = "st,vtg";
reg = <0x8d02800 0x200>;
interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
};
vtg_aux: sti-vtg-aux@8d00200 {
compatible = "st,vtg";
reg = <0x8d00200 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
};
sti-display-subsystem {
compatible = "st,sti-display-subsystem";
#address-cells = <1>;
......
arch/arm/boot/dts/stih410-b2120.dts
View file @ 3cb06b30
......@@ -35,5 +35,29 @@ mmc0: sdhci@09060000 {
sd-uhs-sdr104;
sd-uhs-ddr50;
};
usb2_picophy1: phy2 {
status = "okay";
};
usb2_picophy2: phy3 {
status = "okay";
};
ohci0: usb@9a03c00 {
status = "okay";
};
ehci0: usb@9a03e00 {
status = "okay";
};
ohci1: usb@9a83c00 {
status = "okay";
};
ehci1: usb@9a83e00 {
status = "okay";
};
};
};
arch/arm/boot/dts/stih410.dtsi
View file @ 3cb06b30
......@@ -22,6 +22,8 @@ usb2_picophy1: phy2 {
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
<&picophyreset STIH407_PICOPHY0_RESET>;
reset-names = "global", "port";
status = "disabled";
};
usb2_picophy2: phy3 {
......@@ -31,6 +33,8 @@ usb2_picophy2: phy3 {
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
<&picophyreset STIH407_PICOPHY1_RESET>;
reset-names = "global", "port";
status = "disabled";
};
ohci0: usb@9a03c00 {
......@@ -43,6 +47,8 @@ ohci0: usb@9a03c00 {
reset-names = "power", "softreset";
phys = <&usb2_picophy1>;
phy-names = "usb";
status = "disabled";
};
ehci0: usb@9a03e00 {
......@@ -57,6 +63,8 @@ ehci0: usb@9a03e00 {
reset-names = "power", "softreset";
phys = <&usb2_picophy1>;
phy-names = "usb";
status = "disabled";
};
ohci1: usb@9a83c00 {
......@@ -69,6 +77,8 @@ ohci1: usb@9a83c00 {
reset-names = "power", "softreset";
phys = <&usb2_picophy2>;
phy-names = "usb";
status = "disabled";
};
ehci1: usb@9a83e00 {
......@@ -83,19 +93,8 @@ ehci1: usb@9a83e00 {
reset-names = "power", "softreset";
phys = <&usb2_picophy2>;
phy-names = "usb";
};
/* Display */
vtg_main: sti-vtg-main@8d02800 {
compatible = "st,vtg";
reg = <0x8d02800 0x200>;
interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
};
vtg_aux: sti-vtg-aux@8d00200 {
compatible = "st,vtg";
reg = <0x8d00200 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
status = "disabled";
};
sti-display-subsystem {
......
arch/arm/boot/dts/stih418.dtsi
View file @ 3cb06b30
......@@ -99,5 +99,11 @@ ehci1: usb@9a83e00 {
phys = <&usb2_picophy2>;
phy-names = "usb";
};
mmc0: sdhci@09060000 {
assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
assigned-clock-parents = <&clk_s_c0_pll1 0>;
assigned-clock-rates = <200000000>;
};
};
};
arch/arm/boot/dts/stihxxx-b2120.dtsi
View file @ 3cb06b30
......@@ -27,6 +27,14 @@ green {
};
};
pwm0: pwm@9810000 {
status = "okay";
};
pwm1: pwm@9510000 {
status = "okay";
};
i2c@9842000 {
status = "okay";
};
......
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