Commit 3cc26e36 authored by David S. Miller's avatar David S. Miller
parents d5ef8a4d 4031ae6e
...@@ -190,6 +190,7 @@ struct ixgbe_rx_queue_stats { ...@@ -190,6 +190,7 @@ struct ixgbe_rx_queue_stats {
u64 non_eop_descs; u64 non_eop_descs;
u64 alloc_rx_page_failed; u64 alloc_rx_page_failed;
u64 alloc_rx_buff_failed; u64 alloc_rx_buff_failed;
u64 csum_err;
}; };
enum ixbge_ring_state_t { enum ixbge_ring_state_t {
...@@ -198,6 +199,7 @@ enum ixbge_ring_state_t { ...@@ -198,6 +199,7 @@ enum ixbge_ring_state_t {
__IXGBE_HANG_CHECK_ARMED, __IXGBE_HANG_CHECK_ARMED,
__IXGBE_RX_PS_ENABLED, __IXGBE_RX_PS_ENABLED,
__IXGBE_RX_RSC_ENABLED, __IXGBE_RX_RSC_ENABLED,
__IXGBE_RX_CSUM_UDP_ZERO_ERR,
}; };
#define ring_is_ps_enabled(ring) \ #define ring_is_ps_enabled(ring) \
...@@ -329,6 +331,13 @@ struct ixgbe_q_vector { ...@@ -329,6 +331,13 @@ struct ixgbe_q_vector {
#define IXGBE_10K_ITR 400 #define IXGBE_10K_ITR 400
#define IXGBE_8K_ITR 500 #define IXGBE_8K_ITR 500
/* ixgbe_test_staterr - tests bits in Rx descriptor status and error fields */
static inline __le32 ixgbe_test_staterr(union ixgbe_adv_rx_desc *rx_desc,
const u32 stat_err_bits)
{
return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
}
static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring) static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring)
{ {
u16 ntc = ring->next_to_clean; u16 ntc = ring->next_to_clean;
...@@ -337,11 +346,11 @@ static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring) ...@@ -337,11 +346,11 @@ static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring)
return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
} }
#define IXGBE_RX_DESC_ADV(R, i) \ #define IXGBE_RX_DESC(R, i) \
(&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
#define IXGBE_TX_DESC_ADV(R, i) \ #define IXGBE_TX_DESC(R, i) \
(&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
#define IXGBE_TX_CTXTDESC_ADV(R, i) \ #define IXGBE_TX_CTXTDESC(R, i) \
(&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128 #define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
...@@ -372,7 +381,6 @@ struct ixgbe_adapter { ...@@ -372,7 +381,6 @@ struct ixgbe_adapter {
* thus the additional *_CAPABLE flags. * thus the additional *_CAPABLE flags.
*/ */
u32 flags; u32 flags;
#define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1)
#define IXGBE_FLAG_MSI_CAPABLE (u32)(1 << 1) #define IXGBE_FLAG_MSI_CAPABLE (u32)(1 << 1)
#define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 2) #define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 2)
#define IXGBE_FLAG_MSIX_CAPABLE (u32)(1 << 3) #define IXGBE_FLAG_MSIX_CAPABLE (u32)(1 << 3)
...@@ -535,12 +543,16 @@ enum ixbge_state_t { ...@@ -535,12 +543,16 @@ enum ixbge_state_t {
__IXGBE_IN_SFP_INIT, __IXGBE_IN_SFP_INIT,
}; };
struct ixgbe_rsc_cb { struct ixgbe_cb {
union { /* Union defining head/tail partner */
struct sk_buff *head;
struct sk_buff *tail;
};
dma_addr_t dma; dma_addr_t dma;
u16 skb_cnt; u16 append_cnt;
bool delay_unmap; bool delay_unmap;
}; };
#define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb) #define IXGBE_CB(skb) ((struct ixgbe_cb *)(skb)->cb)
enum ixgbe_boards { enum ixgbe_boards {
board_82598, board_82598,
...@@ -614,8 +626,7 @@ extern int ixgbe_fso(struct ixgbe_ring *tx_ring, struct sk_buff *skb, ...@@ -614,8 +626,7 @@ extern int ixgbe_fso(struct ixgbe_ring *tx_ring, struct sk_buff *skb,
extern void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter); extern void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter);
extern int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter, extern int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
union ixgbe_adv_rx_desc *rx_desc, union ixgbe_adv_rx_desc *rx_desc,
struct sk_buff *skb, struct sk_buff *skb);
u32 staterr);
extern int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, extern int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
struct scatterlist *sgl, unsigned int sgc); struct scatterlist *sgl, unsigned int sgc);
extern int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid, extern int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,
......
...@@ -1739,7 +1739,7 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, ...@@ -1739,7 +1739,7 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
/* initialize next to clean and descriptor values */ /* initialize next to clean and descriptor values */
rx_ntc = rx_ring->next_to_clean; rx_ntc = rx_ring->next_to_clean;
tx_ntc = tx_ring->next_to_clean; tx_ntc = tx_ring->next_to_clean;
rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc); rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
staterr = le32_to_cpu(rx_desc->wb.upper.status_error); staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
while (staterr & IXGBE_RXD_STAT_DD) { while (staterr & IXGBE_RXD_STAT_DD) {
...@@ -1770,7 +1770,7 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, ...@@ -1770,7 +1770,7 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
tx_ntc = 0; tx_ntc = 0;
/* fetch next descriptor */ /* fetch next descriptor */
rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc); rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
staterr = le32_to_cpu(rx_desc->wb.upper.status_error); staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
} }
......
...@@ -357,22 +357,20 @@ int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid, ...@@ -357,22 +357,20 @@ int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,
*/ */
int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter, int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
union ixgbe_adv_rx_desc *rx_desc, union ixgbe_adv_rx_desc *rx_desc,
struct sk_buff *skb, struct sk_buff *skb)
u32 staterr)
{ {
u16 xid;
u32 fctl;
u32 fceofe, fcerr, fcstat;
int rc = -EINVAL; int rc = -EINVAL;
struct ixgbe_fcoe *fcoe; struct ixgbe_fcoe *fcoe;
struct ixgbe_fcoe_ddp *ddp; struct ixgbe_fcoe_ddp *ddp;
struct fc_frame_header *fh; struct fc_frame_header *fh;
struct fcoe_crc_eof *crc; struct fcoe_crc_eof *crc;
__le32 fcerr = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCERR);
__le32 ddp_err;
u32 fctl;
u16 xid;
fcerr = (staterr & IXGBE_RXDADV_ERR_FCERR); if (fcerr == cpu_to_le32(IXGBE_FCERR_BADCRC))
fceofe = (staterr & IXGBE_RXDADV_ERR_FCEOFE); skb->ip_summed = CHECKSUM_NONE;
if (fcerr == IXGBE_FCERR_BADCRC)
skb_checksum_none_assert(skb);
else else
skb->ip_summed = CHECKSUM_UNNECESSARY; skb->ip_summed = CHECKSUM_UNNECESSARY;
...@@ -382,6 +380,7 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter, ...@@ -382,6 +380,7 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
else else
fh = (struct fc_frame_header *)(skb->data + fh = (struct fc_frame_header *)(skb->data +
sizeof(struct fcoe_hdr)); sizeof(struct fcoe_hdr));
fctl = ntoh24(fh->fh_f_ctl); fctl = ntoh24(fh->fh_f_ctl);
if (fctl & FC_FC_EX_CTX) if (fctl & FC_FC_EX_CTX)
xid = be16_to_cpu(fh->fh_ox_id); xid = be16_to_cpu(fh->fh_ox_id);
...@@ -396,27 +395,39 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter, ...@@ -396,27 +395,39 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
if (!ddp->udl) if (!ddp->udl)
goto ddp_out; goto ddp_out;
if (fcerr | fceofe) ddp_err = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCEOFE |
IXGBE_RXDADV_ERR_FCERR);
if (ddp_err)
goto ddp_out; goto ddp_out;
fcstat = (staterr & IXGBE_RXDADV_STAT_FCSTAT); switch (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_FCSTAT)) {
if (fcstat) { /* return 0 to bypass going to ULD for DDPed data */
case __constant_cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_DDP):
/* update length of DDPed data */ /* update length of DDPed data */
ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss); ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
/* unmap the sg list when FCP_RSP is received */ rc = 0;
if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) { break;
pci_unmap_sg(adapter->pdev, ddp->sgl, /* unmap the sg list when FCPRSP is received */
ddp->sgc, DMA_FROM_DEVICE); case __constant_cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_FCPRSP):
ddp->err = (fcerr | fceofe); pci_unmap_sg(adapter->pdev, ddp->sgl,
ddp->sgl = NULL; ddp->sgc, DMA_FROM_DEVICE);
ddp->sgc = 0; ddp->err = ddp_err;
} ddp->sgl = NULL;
/* return 0 to bypass going to ULD for DDPed data */ ddp->sgc = 0;
if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP) /* fall through */
rc = 0; /* if DDP length is present pass it through to ULD */
else if (ddp->len) case __constant_cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_NODDP):
/* update length of DDPed data */
ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
if (ddp->len)
rc = ddp->len; rc = ddp->len;
break;
/* no match will return as an error */
case __constant_cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_NOMTCH):
default:
break;
} }
/* In target mode, check the last data frame of the sequence. /* In target mode, check the last data frame of the sequence.
* For DDP in target mode, data is already DDPed but the header * For DDP in target mode, data is already DDPed but the header
* indication of the last data frame ould allow is to tell if we * indication of the last data frame ould allow is to tell if we
......
...@@ -438,6 +438,11 @@ struct sk_buff { ...@@ -438,6 +438,11 @@ struct sk_buff {
#endif #endif
int skb_iif; int skb_iif;
__u32 rxhash;
__u16 vlan_tci;
#ifdef CONFIG_NET_SCHED #ifdef CONFIG_NET_SCHED
__u16 tc_index; /* traffic control index */ __u16 tc_index; /* traffic control index */
#ifdef CONFIG_NET_CLS_ACT #ifdef CONFIG_NET_CLS_ACT
...@@ -445,8 +450,6 @@ struct sk_buff { ...@@ -445,8 +450,6 @@ struct sk_buff {
#endif #endif
#endif #endif
__u32 rxhash;
__u16 queue_mapping; __u16 queue_mapping;
kmemcheck_bitfield_begin(flags2); kmemcheck_bitfield_begin(flags2);
#ifdef CONFIG_IPV6_NDISC_NODETYPE #ifdef CONFIG_IPV6_NDISC_NODETYPE
...@@ -470,8 +473,6 @@ struct sk_buff { ...@@ -470,8 +473,6 @@ struct sk_buff {
__u32 dropcount; __u32 dropcount;
}; };
__u16 vlan_tci;
sk_buff_data_t transport_header; sk_buff_data_t transport_header;
sk_buff_data_t network_header; sk_buff_data_t network_header;
sk_buff_data_t mac_header; sk_buff_data_t mac_header;
......
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