Commit 3d1ed351 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Pass crtc_state down to icl dpll funcs

Simplify the calling convention of the dpll funcs by plumbing
the crtc state deeper.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-9-ville.syrjala@linux.intel.comReviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 2cf9cd82
...@@ -2470,10 +2470,12 @@ static const struct skl_wrpll_params icl_tbt_pll_19_2MHz_values = { ...@@ -2470,10 +2470,12 @@ static const struct skl_wrpll_params icl_tbt_pll_19_2MHz_values = {
.pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0,
}; };
static bool icl_calc_dp_combo_pll(struct drm_i915_private *dev_priv, int clock, static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state,
struct skl_wrpll_params *pll_params) struct skl_wrpll_params *pll_params)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
const struct skl_wrpll_params *params; const struct skl_wrpll_params *params;
int clock = crtc_state->port_clock;
params = dev_priv->cdclk.hw.ref == 24000 ? params = dev_priv->cdclk.hw.ref == 24000 ?
icl_dp_combo_pll_24MHz_values : icl_dp_combo_pll_24MHz_values :
...@@ -2512,9 +2514,11 @@ static bool icl_calc_dp_combo_pll(struct drm_i915_private *dev_priv, int clock, ...@@ -2512,9 +2514,11 @@ static bool icl_calc_dp_combo_pll(struct drm_i915_private *dev_priv, int clock,
return true; return true;
} }
static bool icl_calc_tbt_pll(struct drm_i915_private *dev_priv, int clock, static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
struct skl_wrpll_params *pll_params) struct skl_wrpll_params *pll_params)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
*pll_params = dev_priv->cdclk.hw.ref == 24000 ? *pll_params = dev_priv->cdclk.hw.ref == 24000 ?
icl_tbt_pll_24MHz_values : icl_tbt_pll_19_2MHz_values; icl_tbt_pll_24MHz_values : icl_tbt_pll_19_2MHz_values;
return true; return true;
...@@ -2530,12 +2534,12 @@ static bool icl_calc_dpll_state(struct intel_crtc_state *crtc_state, ...@@ -2530,12 +2534,12 @@ static bool icl_calc_dpll_state(struct intel_crtc_state *crtc_state,
bool ret; bool ret;
if (intel_port_is_tc(dev_priv, encoder->port)) if (intel_port_is_tc(dev_priv, encoder->port))
ret = icl_calc_tbt_pll(dev_priv, clock, &pll_params); ret = icl_calc_tbt_pll(crtc_state, &pll_params);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) || else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) ||
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
ret = cnl_ddi_calculate_wrpll(crtc_state, &pll_params); ret = cnl_ddi_calculate_wrpll(crtc_state, &pll_params);
else else
ret = icl_calc_dp_combo_pll(dev_priv, clock, &pll_params); ret = icl_calc_dp_combo_pll(crtc_state, &pll_params);
if (!ret) if (!ret)
return false; return false;
......
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