Commit 3d36f429 authored by Youling Tang's avatar Youling Tang Committed by Huacai Chen

LoongArch: Switch to relative exception tables

Similar to other architectures such as arm64, x86, riscv and so on, use
offsets relative to the exception table entry values rather than their
absolute addresses for both the exception location and the fixup.

However, LoongArch label difference because it will actually produce two
relocations, a pair of R_LARCH_ADD32 and R_LARCH_SUB32. Take simple code
below for example:

$ cat test_ex_table.S
.section .text
1:
        nop
.section __ex_table,"a"
        .balign 4
        .long (1b - .)
.previous

$ loongarch64-unknown-linux-gnu-gcc -c test_ex_table.S
$ loongarch64-unknown-linux-gnu-readelf -Wr test_ex_table.o

Relocation section '.rela__ex_table' at offset 0x100 contains 2 entries:
    Offset            Info             Type         Symbol's Value   Symbol's Name + Addend
0000000000000000 0000000600000032 R_LARCH_ADD32    0000000000000000  .L1^B1 + 0
0000000000000000 0000000500000037 R_LARCH_SUB32    0000000000000000  L0^A + 0

The modpost will complain the R_LARCH_SUB32 relocation, so we need to
patch modpost.c to skip this relocation for .rela__ex_table section.
Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 508f28c6
...@@ -6,9 +6,9 @@ ...@@ -6,9 +6,9 @@
#define __ASM_EXTABLE_RAW(insn, fixup) \ #define __ASM_EXTABLE_RAW(insn, fixup) \
.pushsection __ex_table, "a"; \ .pushsection __ex_table, "a"; \
.balign 8; \ .balign 4; \
.quad (insn); \ .long ((insn) - .); \
.quad (fixup); \ .long ((fixup) - .); \
.popsection; .popsection;
.macro _asm_extable, insn, fixup .macro _asm_extable, insn, fixup
...@@ -22,9 +22,9 @@ ...@@ -22,9 +22,9 @@
#define __ASM_EXTABLE_RAW(insn, fixup) \ #define __ASM_EXTABLE_RAW(insn, fixup) \
".pushsection __ex_table, \"a\"\n" \ ".pushsection __ex_table, \"a\"\n" \
".balign 8\n" \ ".balign 4\n" \
".quad ((" insn "))\n" \ ".long ((" insn ") - .)\n" \
".quad ((" fixup "))\n" \ ".long ((" fixup ") - .)\n" \
".popsection\n" ".popsection\n"
#define _ASM_EXTABLE(insn, fixup) \ #define _ASM_EXTABLE(insn, fixup) \
......
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_LOONGARCH_EXTABLE_H
#define _ASM_LOONGARCH_EXTABLE_H
/*
* The exception table consists of pairs of relative offsets: the first
* is the relative offset to an instruction that is allowed to fault,
* and the second is the relative offset at which the program should
* continue. No registers are modified, so it is entirely up to the
* continuation code to figure out what to do.
*
* All the routines below use bits of fixup code that are out of line
* with the main instruction path. This means when everything is well,
* we don't even have to jump over them. Further, they do not intrude
* on our cache or tlb entries.
*/
struct exception_table_entry {
int insn, fixup;
};
#define ARCH_HAS_RELATIVE_EXTABLE
bool fixup_exception(struct pt_regs *regs);
#endif
...@@ -15,8 +15,8 @@ ...@@ -15,8 +15,8 @@
#include <linux/string.h> #include <linux/string.h>
#include <linux/extable.h> #include <linux/extable.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/extable.h>
#include <asm/asm-extable.h> #include <asm/asm-extable.h>
#include <asm-generic/extable.h>
#include <asm-generic/access_ok.h> #include <asm-generic/access_ok.h>
extern u64 __ua_limit; extern u64 __ua_limit;
......
...@@ -3,20 +3,32 @@ ...@@ -3,20 +3,32 @@
* Copyright (C) 2020-2022 Loongson Technology Corporation Limited * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
*/ */
#include <linux/extable.h> #include <linux/extable.h>
#include <linux/spinlock.h>
#include <asm/branch.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
#include <asm/asm-extable.h>
#include <asm/branch.h>
static inline unsigned long
get_ex_fixup(const struct exception_table_entry *ex)
{
return ((unsigned long)&ex->fixup + ex->fixup);
}
int fixup_exception(struct pt_regs *regs) static bool ex_handler_fixup(const struct exception_table_entry *ex,
struct pt_regs *regs)
{ {
const struct exception_table_entry *fixup; regs->csr_era = get_ex_fixup(ex);
fixup = search_exception_tables(exception_era(regs)); return true;
if (fixup) { }
regs->csr_era = fixup->fixup;
bool fixup_exception(struct pt_regs *regs)
{
const struct exception_table_entry *ex;
return 1; ex = search_exception_tables(exception_era(regs));
} if (!ex)
return false;
return 0; return ex_handler_fixup(ex, regs);
} }
...@@ -1523,6 +1523,14 @@ static int addend_mips_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) ...@@ -1523,6 +1523,14 @@ static int addend_mips_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
#define R_RISCV_SUB32 39 #define R_RISCV_SUB32 39
#endif #endif
#ifndef EM_LOONGARCH
#define EM_LOONGARCH 258
#endif
#ifndef R_LARCH_SUB32
#define R_LARCH_SUB32 55
#endif
static void section_rela(const char *modname, struct elf_info *elf, static void section_rela(const char *modname, struct elf_info *elf,
Elf_Shdr *sechdr) Elf_Shdr *sechdr)
{ {
...@@ -1564,6 +1572,11 @@ static void section_rela(const char *modname, struct elf_info *elf, ...@@ -1564,6 +1572,11 @@ static void section_rela(const char *modname, struct elf_info *elf,
ELF_R_TYPE(r.r_info) == R_RISCV_SUB32) ELF_R_TYPE(r.r_info) == R_RISCV_SUB32)
continue; continue;
break; break;
case EM_LOONGARCH:
if (!strcmp("__ex_table", fromsec) &&
ELF_R_TYPE(r.r_info) == R_LARCH_SUB32)
continue;
break;
} }
sym = elf->symtab_start + r_sym; sym = elf->symtab_start + r_sym;
/* Skip special sections */ /* Skip special sections */
......
...@@ -312,12 +312,12 @@ static int do_file(char const *const fname, void *addr) ...@@ -312,12 +312,12 @@ static int do_file(char const *const fname, void *addr)
case EM_PARISC: case EM_PARISC:
case EM_PPC: case EM_PPC:
case EM_PPC64: case EM_PPC64:
case EM_LOONGARCH:
custom_sort = sort_relative_table; custom_sort = sort_relative_table;
break; break;
case EM_ARCOMPACT: case EM_ARCOMPACT:
case EM_ARCV2: case EM_ARCV2:
case EM_ARM: case EM_ARM:
case EM_LOONGARCH:
case EM_MICROBLAZE: case EM_MICROBLAZE:
case EM_MIPS: case EM_MIPS:
case EM_XTENSA: case EM_XTENSA:
......
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