Commit 3d3a3a49 authored by Ravi Bangoria's avatar Ravi Bangoria Committed by Arnaldo Carvalho de Melo

perf script ibs: Change bit description according to latest AMD PPR...

perf script ibs: Change bit description according to latest AMD PPR ("Processor Programming Reference")

Some of the IBS_OP_DATA2 bit descriptions were stale (taken from old
version of PPR). Change it according to latest PPR.
Signed-off-by: default avatarRavi Bangoria <ravi.bangoria@amd.com>
Acked-by: default avatarNamhyung Kim <namhyung@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Ananth Narayan <ananth.narayan@amd.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sandipan Das <sandipan.das@amd.com>
Cc: Santosh Shukla <santosh.shukla@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Link: https://lore.kernel.org/r/20230407112459.548-5-ravi.bangoria@amd.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 4953c897
...@@ -105,17 +105,17 @@ static void pr_ibs_op_data2_extended(union ibs_op_data2 reg) ...@@ -105,17 +105,17 @@ static void pr_ibs_op_data2_extended(union ibs_op_data2 reg)
static const char * const data_src_str[] = { static const char * const data_src_str[] = {
"", "",
" DataSrc 1=Local L3 or other L1/L2 in CCX", " DataSrc 1=Local L3 or other L1/L2 in CCX",
" DataSrc 2=A peer cache in a near CCX", " DataSrc 2=Another CCX cache in the same NUMA node",
" DataSrc 3=Data returned from DRAM", " DataSrc 3=DRAM",
" DataSrc 4=(reserved)", " DataSrc 4=(reserved)",
" DataSrc 5=A peer cache in a far CCX", " DataSrc 5=Another CCX cache in a different NUMA node",
" DataSrc 6=DRAM address map with \"long latency\" bit set", " DataSrc 6=Long-latency DIMM",
" DataSrc 7=Data returned from MMIO/Config/PCI/APIC", " DataSrc 7=MMIO/Config/PCI/APIC",
" DataSrc 8=Extension Memory (S-Link, GenZ, etc)", " DataSrc 8=Extension Memory",
" DataSrc 9=(reserved)", " DataSrc 9=(reserved)",
" DataSrc 10=(reserved)", " DataSrc 10=(reserved)",
" DataSrc 11=(reserved)", " DataSrc 11=(reserved)",
" DataSrc 12=Peer Agent Memory", " DataSrc 12=Coherent Memory of a different processor type",
/* 13 to 31 are reserved. Avoid printing them. */ /* 13 to 31 are reserved. Avoid printing them. */
}; };
int data_src = (reg.data_src_hi << 3) | reg.data_src_lo; int data_src = (reg.data_src_hi << 3) | reg.data_src_lo;
......
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