Commit 3df96909 authored by Michel Dänzer's avatar Michel Dänzer Committed by Dave Airlie

radeon: Fix disabling PCI bus mastering on big endian hosts.

It would previously write basically random bits to PCI configuration space...
Not very surprising that the GPU tended to stop responding completely. The
resulting MCE even froze the whole machine sometimes.

Now resetting the GPU after a lockup has at least a fighting chance of
succeeding.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent dea7e0ac
...@@ -2186,6 +2186,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) ...@@ -2186,6 +2186,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
void r100_bm_disable(struct radeon_device *rdev) void r100_bm_disable(struct radeon_device *rdev)
{ {
u32 tmp; u32 tmp;
u16 tmp16;
/* disable bus mastering */ /* disable bus mastering */
tmp = RREG32(R_000030_BUS_CNTL); tmp = RREG32(R_000030_BUS_CNTL);
...@@ -2196,8 +2197,8 @@ void r100_bm_disable(struct radeon_device *rdev) ...@@ -2196,8 +2197,8 @@ void r100_bm_disable(struct radeon_device *rdev)
WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040); WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040);
tmp = RREG32(RADEON_BUS_CNTL); tmp = RREG32(RADEON_BUS_CNTL);
mdelay(1); mdelay(1);
pci_read_config_word(rdev->pdev, 0x4, (u16*)&tmp); pci_read_config_word(rdev->pdev, 0x4, &tmp16);
pci_write_config_word(rdev->pdev, 0x4, tmp & 0xFFFB); pci_write_config_word(rdev->pdev, 0x4, tmp16 & 0xFFFB);
mdelay(1); mdelay(1);
} }
......
...@@ -324,10 +324,10 @@ void rs600_hpd_fini(struct radeon_device *rdev) ...@@ -324,10 +324,10 @@ void rs600_hpd_fini(struct radeon_device *rdev)
void rs600_bm_disable(struct radeon_device *rdev) void rs600_bm_disable(struct radeon_device *rdev)
{ {
u32 tmp; u16 tmp;
/* disable bus mastering */ /* disable bus mastering */
pci_read_config_word(rdev->pdev, 0x4, (u16*)&tmp); pci_read_config_word(rdev->pdev, 0x4, &tmp);
pci_write_config_word(rdev->pdev, 0x4, tmp & 0xFFFB); pci_write_config_word(rdev->pdev, 0x4, tmp & 0xFFFB);
mdelay(1); mdelay(1);
} }
......
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