Commit 3e9957b4 authored by Florian Fainelli's avatar Florian Fainelli Committed by Ralf Baechle

MIPS: AR7: Fix GPIO register size for Titan variant.

The 'size' variable contains the correct register size for both AR7
and Titan, but we never used it to ioremap the correct register size.
This problem only shows up on Titan.

[ralf@linux-mips.org: Fixed the fix.  The original patch as in patchwork
recognizes the problem correctly then fails to fix it ...]
Reported-by: default avatarAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: default avatarFlorian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/2380/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 10423c91
...@@ -325,9 +325,7 @@ int __init ar7_gpio_init(void) ...@@ -325,9 +325,7 @@ int __init ar7_gpio_init(void)
size = 0x1f; size = 0x1f;
} }
gpch->regs = ioremap_nocache(AR7_REGS_GPIO, gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size);
AR7_REGS_GPIO + 0x10);
if (!gpch->regs) { if (!gpch->regs) {
printk(KERN_ERR "%s: failed to ioremap regs\n", printk(KERN_ERR "%s: failed to ioremap regs\n",
gpch->chip.label); gpch->chip.label);
......
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