Commit 3f5492c5 authored by Jason Liu's avatar Jason Liu Committed by Sascha Hauer

ARM: mx27: Print silicon revision on boot

Silicon revision is useful information to have during kernel boot.

Print the MX27 silicon revision.
Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarJason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent d27536c6
...@@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref) ...@@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref)
clk_enable(&gpio_clk); clk_enable(&gpio_clk);
clk_enable(&emi_clk); clk_enable(&emi_clk);
clk_enable(&iim_clk); clk_enable(&iim_clk);
imx_print_silicon_rev("i.MX27", mx27_revision());
clk_disable(&iim_clk);
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
clk_enable(&uart1_clk); clk_enable(&uart1_clk);
......
...@@ -26,12 +26,12 @@ ...@@ -26,12 +26,12 @@
#include <mach/hardware.h> #include <mach/hardware.h>
static int cpu_silicon_rev = -1; static int mx27_cpu_rev = -1;
static int cpu_partnumber; static int mx27_cpu_partnumber;
#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
static void query_silicon_parameter(void) static int mx27_read_cpu_rev(void)
{ {
u32 val; u32 val;
/* /*
...@@ -42,20 +42,18 @@ static void query_silicon_parameter(void) ...@@ -42,20 +42,18 @@ static void query_silicon_parameter(void)
val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+ SYS_CHIP_ID)); + SYS_CHIP_ID));
mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
switch (val >> 28) { switch (val >> 28) {
case 0: case 0:
cpu_silicon_rev = IMX_CHIP_REVISION_1_0; return IMX_CHIP_REVISION_1_0;
break;
case 1: case 1:
cpu_silicon_rev = IMX_CHIP_REVISION_2_0; return IMX_CHIP_REVISION_2_0;
break;
case 2: case 2:
cpu_silicon_rev = IMX_CHIP_REVISION_2_1; return IMX_CHIP_REVISION_2_1;
break;
default: default:
cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN; return IMX_CHIP_REVISION_UNKNOWN;
} }
cpu_partnumber = (int)((val >> 12) & 0xFFFF);
} }
/* /*
...@@ -65,12 +63,12 @@ static void query_silicon_parameter(void) ...@@ -65,12 +63,12 @@ static void query_silicon_parameter(void)
*/ */
int mx27_revision(void) int mx27_revision(void)
{ {
if (cpu_silicon_rev == -1) if (mx27_cpu_rev == -1)
query_silicon_parameter(); mx27_cpu_rev = mx27_read_cpu_rev();
if (cpu_partnumber != 0x8821) if (mx27_cpu_partnumber != 0x8821)
return -EINVAL; return -EINVAL;
return cpu_silicon_rev; return mx27_cpu_rev;
} }
EXPORT_SYMBOL(mx27_revision); EXPORT_SYMBOL(mx27_revision);
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