[PATCH] ipr: PCI-X capabilities setup fix
From: Andrew Vasquez <andrew.vasquez@qlogic.com> While performing some PCI-X command register tuning with some of QLogic's cards, I stumbled upon some suspect code in ipr.c. It appears the two functions ipr_save_pcix_cmd_reg() and ipr_set_pcix_cmd_reg() are actually reading/updating the PCI-X capabilities register and not in fact the PCI-X command register -- some code from ipr_save_pcix_cmd_reg(): ... int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX); if (pcix_cmd_reg == 0) { dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n"); return -EIO; } pcix_cmd_reg points to the PCI-X capabilities register. Yet, the read: if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg, &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) { dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n"); return -EIO; } and subsequent update of the bits: ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO; should actually apply to the PCI-X Command register 2 bytes further into config space. So, the following: if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg, should actually read as: if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD, The same is true for the 'save' case. Luckily, most devices hardwire the PCI-X capabilities register so the write is effectively a NOOP. Signed-off-by: Brian King <brking@us.ibm.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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