Commit 3ffb1a81 authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Greg Kroah-Hartman

serial: core: Add big-endian iotype

Since most drivers interpret UPIO_MEM32 to mean "little-endian" and use
readl/writel to access the registers, add a parallel UPIO_MEM32BE to
request the use of big-endian MMIO accessors (ioread32be/iowrite32be).
Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 57850a50
......@@ -2153,6 +2153,7 @@ uart_report_port(struct uart_driver *drv, struct uart_port *port)
break;
case UPIO_MEM:
case UPIO_MEM32:
case UPIO_MEM32BE:
case UPIO_AU:
case UPIO_TSI:
snprintf(address, sizeof(address),
......@@ -2796,6 +2797,7 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
(port1->hub6 == port2->hub6);
case UPIO_MEM:
case UPIO_MEM32:
case UPIO_MEM32BE:
case UPIO_AU:
case UPIO_TSI:
return (port1->mapbase == port2->mapbase);
......
......@@ -142,12 +142,13 @@ struct uart_port {
unsigned char iotype; /* io access style */
unsigned char unused1;
#define UPIO_PORT (0)
#define UPIO_HUB6 (1)
#define UPIO_MEM (2)
#define UPIO_MEM32 (3)
#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
#define UPIO_TSI (5) /* Tsi108/109 type IO */
#define UPIO_PORT (0) /* 8b I/O port access */
#define UPIO_HUB6 (1) /* Hub6 ISA card */
#define UPIO_MEM (2) /* 8b MMIO access */
#define UPIO_MEM32 (3) /* 32b little endian */
#define UPIO_MEM32BE (4) /* 32b big endian */
#define UPIO_AU (5) /* Au1x00 and RT288x type IO */
#define UPIO_TSI (6) /* Tsi108/109 type IO */
unsigned int read_status_mask; /* driver specific */
unsigned int ignore_status_mask; /* driver specific */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment