Commit 40395b5c authored by sunliming's avatar sunliming Committed by Rob Clark

drm/msm/dsi: fix the inconsistent indenting

Fix the inconsistent indenting in function msm_dsi_dphy_timing_calc_v3().

Fix the following smatch warnings:

drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:350 msm_dsi_dphy_timing_calc_v3() warn: inconsistent indenting

Fixes: f1fa7ff4 ("drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY")
Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarsunliming <sunliming@kylinos.cn>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/494662/
Link: https://lore.kernel.org/r/20220719015622.646718-1-sunliming@kylinos.cnSigned-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent c51720a6
...@@ -347,7 +347,7 @@ int msm_dsi_dphy_timing_calc_v3(struct msm_dsi_dphy_timing *timing, ...@@ -347,7 +347,7 @@ int msm_dsi_dphy_timing_calc_v3(struct msm_dsi_dphy_timing *timing,
} else { } else {
timing->shared_timings.clk_pre = timing->shared_timings.clk_pre =
linear_inter(tmax, tmin, pcnt2, 0, false); linear_inter(tmax, tmin, pcnt2, 0, false);
timing->shared_timings.clk_pre_inc_by_2 = 0; timing->shared_timings.clk_pre_inc_by_2 = 0;
} }
timing->ta_go = 3; timing->ta_go = 3;
......
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