Commit 403fe77e authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: silk: Correct clock of DU1

The second channel of the display unit uses a different module clock
than the first channel.

Fixes: 84e734f4 ("ARM: dts: silk: add DU DT support")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 7f698bf6
...@@ -424,7 +424,7 @@ &du { ...@@ -424,7 +424,7 @@ &du {
status = "okay"; status = "okay";
clocks = <&mstp7_clks R8A7794_CLK_DU0>, clocks = <&mstp7_clks R8A7794_CLK_DU0>,
<&mstp7_clks R8A7794_CLK_DU0>, <&mstp7_clks R8A7794_CLK_DU1>,
<&x2_clk>, <&x3_clk>; <&x2_clk>, <&x3_clk>;
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
......
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