Commit 40793e85 authored by Dave Airlie's avatar Dave Airlie

Merge branch 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-fixes

Just a few more late fixes for Polaris cards.

* 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux:
  drm/amd/powerplay: workaround for UVD clock issue
  drm/amdgpu: add ACLK_CNTL setting for polaris10
  drm/amd/powerplay: fix issue uvd dpm can't enabled on Polaris11.
  drm/amd/powerplay: Workaround for Memory EDC Error on Polaris10.
  drm/amd/powerplay: Update CKS on/ CKS off voltage offset calculation
  drm/amd/powerplay: disable FFC.
  drm/amd/powerplay: add some definition for FFC feature on polaris.
parents dbdc3bb7 a7f14a18
...@@ -1106,6 +1106,10 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work) ...@@ -1106,6 +1106,10 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
if (fences == 0 && handles == 0) { if (fences == 0 && handles == 0) {
if (adev->pm.dpm_enabled) { if (adev->pm.dpm_enabled) {
amdgpu_dpm_enable_uvd(adev, false); amdgpu_dpm_enable_uvd(adev, false);
/* just work around for uvd clock remain high even
* when uvd dpm disabled on Polaris10 */
if (adev->asic_type == CHIP_POLARIS10)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
} else { } else {
amdgpu_asic_set_uvd_clocks(adev, 0, 0); amdgpu_asic_set_uvd_clocks(adev, 0, 0);
} }
......
...@@ -47,6 +47,8 @@ ...@@ -47,6 +47,8 @@
#include "dce/dce_10_0_d.h" #include "dce/dce_10_0_d.h"
#include "dce/dce_10_0_sh_mask.h" #include "dce/dce_10_0_sh_mask.h"
#include "smu/smu_7_1_3_d.h"
#define GFX8_NUM_GFX_RINGS 1 #define GFX8_NUM_GFX_RINGS 1
#define GFX8_NUM_COMPUTE_RINGS 8 #define GFX8_NUM_COMPUTE_RINGS 8
...@@ -693,6 +695,7 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev) ...@@ -693,6 +695,7 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
amdgpu_program_register_sequence(adev, amdgpu_program_register_sequence(adev,
polaris10_golden_common_all, polaris10_golden_common_all,
(const u32)ARRAY_SIZE(polaris10_golden_common_all)); (const u32)ARRAY_SIZE(polaris10_golden_common_all));
WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C);
break; break;
case CHIP_CARRIZO: case CHIP_CARRIZO:
amdgpu_program_register_sequence(adev, amdgpu_program_register_sequence(adev,
......
...@@ -315,6 +315,7 @@ struct polaris10_hwmgr { ...@@ -315,6 +315,7 @@ struct polaris10_hwmgr {
uint32_t avfs_vdroop_override_setting; uint32_t avfs_vdroop_override_setting;
bool apply_avfs_cks_off_voltage; bool apply_avfs_cks_off_voltage;
uint32_t frame_time_x2;
}; };
/* To convert to Q8.8 format for firmware */ /* To convert to Q8.8 format for firmware */
......
...@@ -411,6 +411,8 @@ struct phm_cac_tdp_table { ...@@ -411,6 +411,8 @@ struct phm_cac_tdp_table {
uint8_t ucVr_I2C_Line; uint8_t ucVr_I2C_Line;
uint8_t ucPlx_I2C_address; uint8_t ucPlx_I2C_address;
uint8_t ucPlx_I2C_Line; uint8_t ucPlx_I2C_Line;
uint32_t usBoostPowerLimit;
uint8_t ucCKS_LDO_REFSEL;
}; };
struct phm_ppm_table { struct phm_ppm_table {
......
...@@ -392,6 +392,8 @@ typedef uint16_t PPSMC_Result; ...@@ -392,6 +392,8 @@ typedef uint16_t PPSMC_Result;
#define PPSMC_MSG_SetGpuPllDfsForSclk ((uint16_t) 0x300) #define PPSMC_MSG_SetGpuPllDfsForSclk ((uint16_t) 0x300)
#define PPSMC_MSG_Didt_Block_Function ((uint16_t) 0x301) #define PPSMC_MSG_Didt_Block_Function ((uint16_t) 0x301)
#define PPSMC_MSG_SetVBITimeout ((uint16_t) 0x306)
#define PPSMC_MSG_SecureSRBMWrite ((uint16_t) 0x600) #define PPSMC_MSG_SecureSRBMWrite ((uint16_t) 0x600)
#define PPSMC_MSG_SecureSRBMRead ((uint16_t) 0x601) #define PPSMC_MSG_SecureSRBMRead ((uint16_t) 0x601)
#define PPSMC_MSG_SetAddress ((uint16_t) 0x800) #define PPSMC_MSG_SetAddress ((uint16_t) 0x800)
......
...@@ -270,7 +270,8 @@ struct SMU74_Discrete_DpmTable { ...@@ -270,7 +270,8 @@ struct SMU74_Discrete_DpmTable {
uint8_t BootPhases; uint8_t BootPhases;
uint8_t VRHotLevel; uint8_t VRHotLevel;
uint8_t Reserved1[3]; uint8_t LdoRefSel;
uint8_t Reserved1[2];
uint16_t FanStartTemperature; uint16_t FanStartTemperature;
uint16_t FanStopTemperature; uint16_t FanStopTemperature;
uint16_t MaxVoltage; uint16_t MaxVoltage;
......
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