ppc64: merge in changes from x86 irq balance code

arch/ppc64/kernel/irq.c

@@ -410,11 +410,13 @@ static irq_balance_t irq_balance[NR_IRQS] __cacheline_aligned
 			= { [ 0 ... NR_IRQS-1 ] = { 0, 0 } };
 
 #define IDLE_ENOUGH(cpu,now) \
-		(idle_cpu(cpu) && ((now) - irq_stat[(cpu)].idle_timestamp > ((HZ/100)+1)))
+		(idle_cpu(cpu) && ((now) - irq_stat[(cpu)].idle_timestamp > 1))
 
 #define IRQ_ALLOWED(cpu,allowed_mask) \
 		((1 << cpu) & (allowed_mask))
 
+#define IRQ_BALANCE_INTERVAL (HZ/50)
+
 static unsigned long move(unsigned long curr_cpu, unsigned long allowed_mask,
 			  unsigned long now, int direction)
 {
@@ -447,8 +449,9 @@ static inline void balance_irq(int irq)
 	irq_balance_t *entry = irq_balance + irq;
 	unsigned long now = jiffies;
 
-	if (unlikely(entry->timestamp != now)) {
+	if (unlikely(time_after(now, entry->timestamp + IRQ_BALANCE_INTERVAL))) {
 		unsigned long allowed_mask;
+		unsigned int new_cpu;
 		unsigned long random_number;
 
 		if (!irq_desc[irq].handler->set_affinity)
@@ -459,8 +462,11 @@ static inline void balance_irq(int irq)
 
 		allowed_mask = cpu_online_map & irq_affinity[irq];
 		entry->timestamp = now;
-		entry->cpu = move(entry->cpu, allowed_mask, now, random_number);
-		irq_desc[irq].handler->set_affinity(irq, 1 << entry->cpu);
+		new_cpu = move(entry->cpu, allowed_mask, now, random_number);
+		if (entry->cpu != new_cpu) {
+			entry->cpu = new_cpu;
+			irq_desc[irq].handler->set_affinity(irq, 1 << new_cpu);
+		}
 	}
 }
 #else