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Commit 414c8385 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'tegra-for-3.15-dt' of... 

Merge tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Merge "ARM: tegra: device tree changes for 3.15" from Stephen Warren:

This enables:
- host1x and eDP support on Tegra124.
- LCD panel support for a few Tegra20 devices and Venice2.
- Enables power down, SPI flash, and USB on Venice2.
- Documents which Dalmore revision is supported.
- Adds an I2C bus mux to Cardhu.

Additionally, Tegra124 is converted to use #address-cells=<2> since the
HW suports more than 32-bits of address space, and various cleanups are
included.

* tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (21 commits)
  ARM: dts: tegra: add PCIe interrupt mapping properties
  ARM: tegra: use 2 address cells for Tegra124 DT
  ARM: tegra: Rename as3722 node to pmic
  ARM: tegra: Fix whitespace around '='
  ARM: tegra: Enable USB on Venice2
  ARM: tegra: Add Tegra124 USB support
  ARM: tegra: Enable eDP for Venice2
  ARM: tegra: Add Tegra124 eDP support
  ARM: tegra: Add Tegra124 host1x support
  ARM: tegra: Hook up SDMMC3 power-supply on Venice2
  ARM: tegra: Overhaul Venice2 regulators
  ARM: tegra: Combine VBUS enable pins into one node
  ARM: tegra: Use "disabled" for status property
  ARM: tegra: add SPI flash to Venice2 DT
  ARM: tegra: enable PCA9546 on Cardhu
  ARM: tegra: enable LCD panel on Ventana
  ARM: tegra: enable LCD panel on Seaboard
  ARM: tegra: add system-power-controller property for PMIC node
  ARM: tegra: document which Dalmore revisions are supported
  ARM: tegra: Properly sort clocks property
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 98907c2d 97070bd4
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Showing with 617 additions and 201 deletions
Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
View file @ 414c8385
......@@ -42,6 +42,10 @@ Required properties:
- 0xc2000000: prefetchable memory region
Please refer to the standard PCI bus binding document for a more detailed
explanation.
- #interrupt-cells: Size representation for interrupts (must be 1)
- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
Please refer to the standard PCI bus binding document for a more detailed
explanation.
- clocks: Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names: Must include the following entries:
......@@ -86,6 +90,10 @@ SoC DTSI:
0 99 0x04>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
......
arch/arm/boot/dts/tegra114-dalmore.dts
View file @ 414c8385
/*
* This dts file supports Dalmore A04.
* Other board revisions are not supported
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
......
arch/arm/boot/dts/tegra114.dtsi
View file @ 414c8385
......@@ -604,7 +604,7 @@ sdhci@78000000 {
clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disable";
status = "disabled";
};
sdhci@78000200 {
......@@ -614,7 +614,7 @@ sdhci@78000200 {
clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disable";
status = "disabled";
};
sdhci@78000400 {
......@@ -624,7 +624,7 @@ sdhci@78000400 {
clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disable";
status = "disabled";
};
sdhci@78000600 {
......@@ -634,7 +634,7 @@ sdhci@78000600 {
clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disable";
status = "disabled";
};
usb@7d000000 {
......
arch/arm/boot/dts/tegra124-venice2.dts
View file @ 414c8385
This diff is collapsed.
arch/arm/boot/dts/tegra124.dtsi
View file @ 414c8385
This diff is collapsed.
arch/arm/boot/dts/tegra20-paz00.dts
View file @ 414c8385
......@@ -17,6 +17,14 @@ memory {
};
host1x@50000000 {
dc@54200000 {
rgb {
status = "okay";
nvidia,panel = <&panel>;
};
};
hdmi@54280000 {
status = "okay";
......@@ -257,7 +265,11 @@ serial@70006200 {
status = "okay";
};
i2c@7000c000 {
pwm: pwm@7000a000 {
status = "okay";
};
lvds_ddc: i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
......@@ -475,6 +487,18 @@ sdhci@c8000600 {
non-removable;
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
pwms = <&pwm 0 5000000>;
brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
default-brightness-level = <10>;
backlight-boot-off;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -509,6 +533,16 @@ wifi {
};
};
panel: panel {
compatible = "samsung,ltn101nt05", "simple-panel";
ddc-i2c-bus = <&lvds_ddc>;
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -522,6 +556,16 @@ p5valw_reg: regulator@0 {
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_pnl_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "+3VS,vdd_pnl";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
sound {
......
arch/arm/boot/dts/tegra20-seaboard.dts
View file @ 414c8385
......@@ -17,6 +17,14 @@ memory {
};
host1x@50000000 {
dc@54200000 {
rgb {
status = "okay";
nvidia,panel = <&panel>;
};
};
hdmi@54280000 {
status = "okay";
......@@ -312,6 +320,10 @@ serial@70006300 {
status = "okay";
};
pwm: pwm@7000a000 {
status = "okay";
};
i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
......@@ -369,7 +381,7 @@ hdmi_ddc: i2c@0 {
#size-cells = <0>;
};
i2c@1 {
lvds_ddc: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -762,6 +774,17 @@ sdhci@c8000600 {
non-removable;
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 2 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -795,6 +818,16 @@ lid {
};
};
panel: panel {
compatible = "chunghwa,claa101wa01a", "simple-panel";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
ddc-i2c-bus = <&lvds_ddc>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -839,6 +872,26 @@ vbus_reg: regulator@3 {
regulator-always-on;
regulator-boot-on;
};
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
sound {
......
arch/arm/boot/dts/tegra20-ventana.dts
View file @ 414c8385
......@@ -17,6 +17,14 @@ memory {
};
host1x@50000000 {
dc@54200000 {
rgb {
status = "okay";
nvidia,panel = <&panel>;
};
};
hdmi@54280000 {
status = "okay";
......@@ -309,6 +317,10 @@ serial@70006300 {
status = "okay";
};
pwm: pwm@7000a000 {
status = "okay";
};
i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
......@@ -359,7 +371,7 @@ hdmi_ddc: i2c@0 {
#size-cells = <0>;
};
i2c@1 {
lvds_ddc: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -557,6 +569,17 @@ sdhci@c8000600 {
non-removable;
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 2 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -581,6 +604,16 @@ power {
};
};
panel: panel {
compatible = "chunghwa,claa101wa01a", "simple-panel";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
ddc-i2c-bus = <&lvds_ddc>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -614,7 +647,7 @@ regulator@2 {
enable-active-high;
};
regulator@3 {
vdd_pnl_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_pnl";
......@@ -624,7 +657,7 @@ regulator@3 {
enable-active-high;
};
regulator@4 {
vdd_bl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_bl";
......
arch/arm/boot/dts/tegra20.dtsi
View file @ 414c8385
......@@ -556,6 +556,10 @@ pcie-controller@80003000 {
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
......
arch/arm/boot/dts/tegra30-cardhu.dtsi
View file @ 414c8385
......@@ -187,6 +187,13 @@ isl29028@44 {
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
};
i2cmux@70 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
};
};
i2c@7000c700 {
......
arch/arm/boot/dts/tegra30.dtsi
View file @ 414c8385
......@@ -28,6 +28,10 @@ pcie-controller@00003000 {
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
......@@ -144,9 +148,9 @@ gr2d@54140000 {
compatible = "nvidia,tegra30-gr2d";
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_GR2D>;
resets = <&tegra_car 21>;
reset-names = "2d";
clocks = <&tegra_car TEGRA30_CLK_GR2D>;
};
gr3d@54180000 {
......
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