Commit 416379f9 authored by Niklas Cassel's avatar Niklas Cassel Committed by Bjorn Helgaas

PCI: designware: Check for iATU unroll support after initializing host

dw_pcie_iatu_unroll_enabled() reads a dbi_base register.  Reading any
dbi_base register before pp->ops->host_init has been called causes
"imprecise external abort" on platforms like ARTPEC-6, where the PCIe
module is disabled at boot and first enabled in pp->ops->host_init.  Move
dw_pcie_iatu_unroll_enabled() to dw_pcie_setup_rc(), since it is after
pp->ops->host_init, but before pp->iatu_unroll_enabled is actually used.

Fixes: a0601a47 ("PCI: designware: Add iATU Unroll feature")
Tested-by: default avatarJames Le Cuirot <chewi@gentoo.org>
Signed-off-by: default avatarNiklas Cassel <niklas.cassel@axis.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJoao Pinto <jpinto@synopsys.com>
Acked-by: default avatarOlof Johansson <olof@lixom.net>
parent ad110449
...@@ -637,8 +637,6 @@ int dw_pcie_host_init(struct pcie_port *pp) ...@@ -637,8 +637,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
} }
} }
pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
if (pp->ops->host_init) if (pp->ops->host_init)
pp->ops->host_init(pp); pp->ops->host_init(pp);
...@@ -809,6 +807,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp) ...@@ -809,6 +807,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
{ {
u32 val; u32 val;
/* get iATU unroll support */
pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
dev_dbg(pp->dev, "iATU unroll: %s\n",
pp->iatu_unroll_enabled ? "enabled" : "disabled");
/* set the number of lanes */ /* set the number of lanes */
val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL); val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL);
val &= ~PORT_LINK_MODE_MASK; val &= ~PORT_LINK_MODE_MASK;
......
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