Commit 420c158d authored by Catalin Marinas's avatar Catalin Marinas

arm64: Treat the bitops index argument as an 'int'

The bitops prototype use an 'int' as the bit index type but the asm
implementation assume it to be a 'long'. Since the compiler does not
guarantee zeroing the upper 32-bits in a register when used as 'int',
change the bitops implementation accordingly.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 0e7f7bcc
...@@ -21,13 +21,13 @@ ...@@ -21,13 +21,13 @@
/* /*
* x0: bits 5:0 bit offset * x0: bits 5:0 bit offset
* bits 63:6 word offset * bits 31:6 word offset
* x1: address * x1: address
*/ */
.macro bitop, name, instr .macro bitop, name, instr
ENTRY( \name ) ENTRY( \name )
and x3, x0, #63 // Get bit offset and w3, w0, #63 // Get bit offset
eor x0, x0, x3 // Clear low bits eor w0, w0, w3 // Clear low bits
mov x2, #1 mov x2, #1
add x1, x1, x0, lsr #3 // Get word offset add x1, x1, x0, lsr #3 // Get word offset
lsl x3, x2, x3 // Create mask lsl x3, x2, x3 // Create mask
...@@ -41,8 +41,8 @@ ENDPROC(\name ) ...@@ -41,8 +41,8 @@ ENDPROC(\name )
.macro testop, name, instr .macro testop, name, instr
ENTRY( \name ) ENTRY( \name )
and x3, x0, #63 // Get bit offset and w3, w0, #63 // Get bit offset
eor x0, x0, x3 // Clear low bits eor w0, w0, w3 // Clear low bits
mov x2, #1 mov x2, #1
add x1, x1, x0, lsr #3 // Get word offset add x1, x1, x0, lsr #3 // Get word offset
lsl x4, x2, x3 // Create mask lsl x4, x2, x3 // Create mask
......
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