Commit 4280506a authored by Tomasz Figa's avatar Tomasz Figa

ARM: SAMSUNG: Move all platforms to new clocksource driver

This patch moves all Samsung platforms using PWM clocksource from legacy
samsung-time to new samsung-pwm-timer driver.
Signed-off-by: default avatarTomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Tested-by: default avatarMark Brown <broonie@linaro.org>
Tested-by: default avatarSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 1c161fd0
...@@ -700,7 +700,7 @@ config ARCH_S3C24XX ...@@ -700,7 +700,7 @@ config ARCH_S3C24XX
select ARCH_HAS_CPUFREQ select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_SAMSUNG_PWM
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG select GPIO_SAMSUNG
select HAVE_CLK select HAVE_CLK
...@@ -723,7 +723,7 @@ config ARCH_S3C64XX ...@@ -723,7 +723,7 @@ config ARCH_S3C64XX
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_VIC select ARM_VIC
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_SAMSUNG_PWM
select CPU_V6 select CPU_V6
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG select GPIO_SAMSUNG
...@@ -748,7 +748,7 @@ config ARCH_S3C64XX ...@@ -748,7 +748,7 @@ config ARCH_S3C64XX
config ARCH_S5P64X0 config ARCH_S5P64X0
bool "Samsung S5P6440 S5P6450" bool "Samsung S5P6440 S5P6450"
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_SAMSUNG_PWM
select CPU_V6 select CPU_V6
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG select GPIO_SAMSUNG
...@@ -767,7 +767,7 @@ config ARCH_S5PC100 ...@@ -767,7 +767,7 @@ config ARCH_S5PC100
bool "Samsung S5PC100" bool "Samsung S5PC100"
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_SAMSUNG_PWM
select CPU_V7 select CPU_V7
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG select GPIO_SAMSUNG
...@@ -787,7 +787,7 @@ config ARCH_S5PV210 ...@@ -787,7 +787,7 @@ config ARCH_S5PV210
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_SAMSUNG_PWM
select CPU_V7 select CPU_V7
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG select GPIO_SAMSUNG
......
...@@ -30,7 +30,6 @@ config CPU_S3C2410 ...@@ -30,7 +30,6 @@ config CPU_S3C2410
select S3C2410_CLOCK select S3C2410_CLOCK
select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
select S3C2410_PM if PM select S3C2410_PM if PM
select SAMSUNG_HRT
select SAMSUNG_WDT_RESET select SAMSUNG_WDT_RESET
help help
Support for S3C2410 and S3C2410A family from the S3C24XX line Support for S3C2410 and S3C2410A family from the S3C24XX line
...@@ -42,7 +41,6 @@ config CPU_S3C2412 ...@@ -42,7 +41,6 @@ config CPU_S3C2412
select CPU_LLSERIAL_S3C2440 select CPU_LLSERIAL_S3C2440
select S3C2412_DMA if S3C24XX_DMA select S3C2412_DMA if S3C24XX_DMA
select S3C2412_PM if PM select S3C2412_PM if PM
select SAMSUNG_HRT
help help
Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
...@@ -54,7 +52,6 @@ config CPU_S3C2416 ...@@ -54,7 +52,6 @@ config CPU_S3C2416
select S3C2443_COMMON select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC select SAMSUNG_CLKSRC
select SAMSUNG_HRT
help help
Support for the S3C2416 SoC from the S3C24XX line Support for the S3C2416 SoC from the S3C24XX line
...@@ -65,7 +62,6 @@ config CPU_S3C2440 ...@@ -65,7 +62,6 @@ config CPU_S3C2440
select S3C2410_CLOCK select S3C2410_CLOCK
select S3C2410_PM if PM select S3C2410_PM if PM
select S3C2440_DMA if S3C24XX_DMA select S3C2440_DMA if S3C24XX_DMA
select SAMSUNG_HRT
help help
Support for S3C2440 Samsung Mobile CPU based systems. Support for S3C2440 Samsung Mobile CPU based systems.
...@@ -75,7 +71,6 @@ config CPU_S3C2442 ...@@ -75,7 +71,6 @@ config CPU_S3C2442
select CPU_LLSERIAL_S3C2440 select CPU_LLSERIAL_S3C2440
select S3C2410_CLOCK select S3C2410_CLOCK
select S3C2410_PM if PM select S3C2410_PM if PM
select SAMSUNG_HRT
help help
Support for S3C2442 Samsung Mobile CPU based systems. Support for S3C2442 Samsung Mobile CPU based systems.
...@@ -91,7 +86,6 @@ config CPU_S3C2443 ...@@ -91,7 +86,6 @@ config CPU_S3C2443
select S3C2443_COMMON select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC select SAMSUNG_CLKSRC
select SAMSUNG_HRT
help help
Support for the S3C2443 SoC from the S3C24XX line Support for the S3C2443 SoC from the S3C24XX line
......
...@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) ...@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
samsung_pwm_set_platdata(&s3c24xx_pwm_variant); samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
} }
void __init samsung_set_timer_source(unsigned int event, unsigned int source)
{
s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
}
void __init samsung_timer_init(void)
{
unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
};
samsung_pwm_clocksource_init(S3C_VA_TIMER,
timer_irqs, &s3c24xx_pwm_variant);
}
/* Serial port registrations */ /* Serial port registrations */
#define S3C2410_PA_UART0 (S3C24XX_PA_UART) #define S3C2410_PA_UART0 (S3C24XX_PA_UART)
......
...@@ -17,13 +17,11 @@ config PLAT_S3C64XX ...@@ -17,13 +17,11 @@ config PLAT_S3C64XX
# Configuration options for the S3C6410 CPU # Configuration options for the S3C6410 CPU
config CPU_S3C6400 config CPU_S3C6400
select SAMSUNG_HRT
bool bool
help help
Enable S3C6400 CPU support Enable S3C6400 CPU support
config CPU_S3C6410 config CPU_S3C6410
select SAMSUNG_HRT
bool bool
help help
Enable S3C6410 CPU support Enable S3C6410 CPU support
......
...@@ -43,7 +43,6 @@ ...@@ -43,7 +43,6 @@
#include <plat/pm.h> #include <plat/pm.h>
#include <plat/gpio-cfg.h> #include <plat/gpio-cfg.h>
#include <plat/irq-uart.h> #include <plat/irq-uart.h>
#include <plat/irq-vic-timer.h>
#include <plat/pwm-core.h> #include <plat/pwm-core.h>
#include <plat/regs-irqtype.h> #include <plat/regs-irqtype.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
...@@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = { ...@@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
.tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
}; };
void __init samsung_set_timer_source(unsigned int event, unsigned int source)
{
s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
}
void __init samsung_timer_init(void)
{
unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
};
samsung_pwm_clocksource_init(S3C_VA_TIMER,
timer_irqs, &s3c64xx_pwm_variant);
}
/* read cpu identification code */ /* read cpu identification code */
void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
...@@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) ...@@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
/* initialise the pair of VICs */ /* initialise the pair of VICs */
vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
/* add the timer sub-irqs */
s3c_init_vic_timer_irq(5, IRQ_TIMER0);
} }
#define eint_offset(irq) ((irq) - IRQ_EINT(0)) #define eint_offset(irq) ((irq) - IRQ_EINT(0))
......
...@@ -11,14 +11,12 @@ config CPU_S5P6440 ...@@ -11,14 +11,12 @@ config CPU_S5P6440
bool bool
select S5P_SLEEP if PM select S5P_SLEEP if PM
select SAMSUNG_DMADEV select SAMSUNG_DMADEV
select SAMSUNG_HRT
select SAMSUNG_WAKEMASK if PM select SAMSUNG_WAKEMASK if PM
help help
Enable S5P6440 CPU support Enable S5P6440 CPU support
config CPU_S5P6450 config CPU_S5P6450
bool bool
select SAMSUNG_HRT
select S5P_SLEEP if PM select S5P_SLEEP if PM
select SAMSUNG_DMADEV select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM select SAMSUNG_WAKEMASK if PM
......
...@@ -166,6 +166,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = { ...@@ -166,6 +166,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
.tclk_mask = 0, .tclk_mask = 0,
}; };
void __init samsung_set_timer_source(unsigned int event, unsigned int source)
{
s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
}
void __init samsung_timer_init(void)
{
unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
};
samsung_pwm_clocksource_init(S3C_VA_TIMER,
timer_irqs, &s5p64x0_pwm_variant);
}
/* /*
* s5p64x0_map_io * s5p64x0_map_io
* *
......
...@@ -11,7 +11,6 @@ config CPU_S5PC100 ...@@ -11,7 +11,6 @@ config CPU_S5PC100
bool bool
select S5P_EXT_INT select S5P_EXT_INT
select SAMSUNG_DMADEV select SAMSUNG_DMADEV
select SAMSUNG_HRT
help help
Enable S5PC100 CPU support Enable S5PC100 CPU support
......
...@@ -141,6 +141,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = { ...@@ -141,6 +141,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
.tclk_mask = (1 << 5), .tclk_mask = (1 << 5),
}; };
void __init samsung_set_timer_source(unsigned int event, unsigned int source)
{
s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
}
void __init samsung_timer_init(void)
{
unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
};
samsung_pwm_clocksource_init(S3C_VA_TIMER,
timer_irqs, &s5pc100_pwm_variant);
}
/* /*
* s5pc100_map_io * s5pc100_map_io
* *
......
...@@ -15,7 +15,6 @@ config CPU_S5PV210 ...@@ -15,7 +15,6 @@ config CPU_S5PV210
select S5P_PM if PM select S5P_PM if PM
select S5P_SLEEP if PM select S5P_SLEEP if PM
select SAMSUNG_DMADEV select SAMSUNG_DMADEV
select SAMSUNG_HRT
help help
Enable S5PV210 CPU support Enable S5PV210 CPU support
......
...@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = { ...@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
.tclk_mask = (1 << 5), .tclk_mask = (1 << 5),
}; };
void __init samsung_set_timer_source(unsigned int event, unsigned int source)
{
s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
}
void __init samsung_timer_init(void)
{
unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
};
samsung_pwm_clocksource_init(S3C_VA_TIMER,
timer_irqs, &s5pv210_pwm_variant);
}
/* /*
* s5pv210_map_io * s5pv210_map_io
* *
......
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
#include <mach/map.h> #include <mach/map.h>
#include <plat/regs-timer.h> #include <plat/regs-timer.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/irq-vic-timer.h>
void __init s5p_init_irq(u32 *vic, u32 num_vic) void __init s5p_init_irq(u32 *vic, u32 num_vic)
{ {
...@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic) ...@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
for (irq = 0; irq < num_vic; irq++) for (irq = 0; irq < num_vic; irq++)
vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
#endif #endif
s3c_init_vic_timer_irq(5, IRQ_TIMER0);
} }
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