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Commit 42c78a5b authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'soc-fixes-6.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC fixes from Arnd Bergmann:
 "The majority of bugfixes is once more for the NXP i.MX platform,
  addressing issue with i.MX8M (UART, watchdog and ethernet) as well as
  imx8dxl power button and the USB modem on an imx7 board.

  The reason that i.MX always shows up here is obviously not that they
  are more buggy than the others, but they have the most boards and are
  good about getting fixes in quickly.

  The other DT fixes are for the Nuvoton wpcm450 flash controller and
  the i2c mux on an ASpeed board.

  Lastly, there are updates to the MAINTAINERS entries for Mediatek,
  AMD/Seattle and NXP SoCs, as well as a lone code fix for error
  handling in the allwinner 'rsb' bus driver"

* tag 'soc-fixes-6.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: wpcm450: Add nuvoton,shm = <&shm> to FIU node
  MAINTAINERS: Update entry for MediaTek SoC support
  MAINTAINERS: amd: drop inactive Brijesh Singh
  ARM: dts: imx7d-smegw01: Fix USB host over-current polarity
  arm64: dts: imx8mm-verdin: Do not power down eth-phy
  MAINTAINERS: match freescale ARM64 DT directory in i.MX entry
  arm64: dts: imx8mm: Fix pad control for UART1_DTE_RX
  ARM: dts: aspeed: Fix pca9849 compatible
  arm64: dts: freescale: imx8dxl: fix sc_pwrkey's property name linux,keycode
  arm64: dts: imx8m-venice: Remove incorrect 'uart-has-rtscts'
  arm64: dts: imx8mm: Reinstate GPIO watchdog always-running property on eDM SBC
  bus: sunxi-rsb: Fix error handling in sunxi_rsb_init()
parents addfba11 5efb6480
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MAINTAINERS
View file @ 42c78a5b
...@@ -1097,7 +1097,6 @@ S: Maintained ...@@ -1097,7 +1097,6 @@ S: Maintained
F: drivers/dma/ptdma/ F: drivers/dma/ptdma/
AMD SEATTLE DEVICE TREE SUPPORT AMD SEATTLE DEVICE TREE SUPPORT
M: Brijesh Singh <brijeshkumar.singh@amd.com>
M: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> M: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
M: Tom Lendacky <thomas.lendacky@amd.com> M: Tom Lendacky <thomas.lendacky@amd.com>
S: Supported S: Supported
...@@ -2212,6 +2211,9 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) ...@@ -2212,6 +2211,9 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
X: drivers/media/i2c/ X: drivers/media/i2c/
F: arch/arm64/boot/dts/freescale/
X: arch/arm64/boot/dts/freescale/fsl-*
X: arch/arm64/boot/dts/freescale/qoriq-*
N: imx N: imx
N: mxs N: mxs
...@@ -2450,11 +2452,14 @@ F: drivers/rtc/rtc-mt7622.c ...@@ -2450,11 +2452,14 @@ F: drivers/rtc/rtc-mt7622.c
ARM/Mediatek SoC support ARM/Mediatek SoC support
M: Matthias Brugger <matthias.bgg@gmail.com> M: Matthias Brugger <matthias.bgg@gmail.com>
R: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
L: linux-kernel@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
W: https://mtk.wiki.kernel.org/ W: https://mtk.wiki.kernel.org/
C: irc://chat.freenode.net/linux-mediatek C: irc://irc.libera.chat/linux-mediatek
F: arch/arm/boot/dts/mt2*
F: arch/arm/boot/dts/mt6* F: arch/arm/boot/dts/mt6*
F: arch/arm/boot/dts/mt7* F: arch/arm/boot/dts/mt7*
F: arch/arm/boot/dts/mt8* F: arch/arm/boot/dts/mt8*
...@@ -2462,7 +2467,7 @@ F: arch/arm/mach-mediatek/ ...@@ -2462,7 +2467,7 @@ F: arch/arm/mach-mediatek/
F: arch/arm64/boot/dts/mediatek/ F: arch/arm64/boot/dts/mediatek/
F: drivers/soc/mediatek/ F: drivers/soc/mediatek/
N: mtk N: mtk
N: mt[678] N: mt[2678]
K: mediatek K: mediatek
ARM/Mediatek USB3 PHY DRIVER ARM/Mediatek USB3 PHY DRIVER
......
arch/arm/boot/dts/aspeed-bmc-ibm-bonnell.dts
View file @ 42c78a5b
...@@ -751,7 +751,7 @@ tmp435@4c { ...@@ -751,7 +751,7 @@ tmp435@4c {
}; };
pca9849@75 { pca9849@75 {
compatible = "nxp,pca849"; compatible = "nxp,pca9849";
reg = <0x75>; reg = <0x75>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
arch/arm/boot/dts/imx7d-smegw01.dts
View file @ 42c78a5b
...@@ -198,6 +198,7 @@ &usbotg1 { ...@@ -198,6 +198,7 @@ &usbotg1 {
&usbotg2 { &usbotg2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg2>; pinctrl-0 = <&pinctrl_usbotg2>;
over-current-active-low;
dr_mode = "host"; dr_mode = "host";
status = "okay"; status = "okay";
}; };
...@@ -374,7 +375,7 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x04 ...@@ -374,7 +375,7 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x04
pinctrl_usbotg2: usbotg2grp { pinctrl_usbotg2: usbotg2grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x04 MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x5c
>; >;
}; };
......
arch/arm/boot/dts/nuvoton-wpcm450.dtsi
View file @ 42c78a5b
...@@ -480,6 +480,7 @@ fiu: spi-controller@c8000000 { ...@@ -480,6 +480,7 @@ fiu: spi-controller@c8000000 {
reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>; reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
reg-names = "control", "memory"; reg-names = "control", "memory";
clocks = <&clk 0>; clocks = <&clk 0>;
nuvoton,shm = <&shm>;
status = "disabled"; status = "disabled";
}; };
......
arch/arm64/boot/dts/freescale/imx8dxl.dtsi
View file @ 42c78a5b
...@@ -164,7 +164,7 @@ rtc: rtc { ...@@ -164,7 +164,7 @@ rtc: rtc {
sc_pwrkey: keys { sc_pwrkey: keys {
compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
linux,keycode = <KEY_POWER>; linux,keycodes = <KEY_POWER>;
wakeup-source; wakeup-source;
}; };
......
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
View file @ 42c78a5b
...@@ -88,6 +88,7 @@ watchdog { ...@@ -88,6 +88,7 @@ watchdog {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_watchdog_gpio>; pinctrl-0 = <&pinctrl_watchdog_gpio>;
compatible = "linux,wdt-gpio"; compatible = "linux,wdt-gpio";
always-running;
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
hw_algo = "level"; hw_algo = "level";
/* Reset triggers in 2..3 seconds */ /* Reset triggers in 2..3 seconds */
......
arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
View file @ 42c78a5b
...@@ -602,7 +602,7 @@ ...@@ -602,7 +602,7 @@
#define MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22 0x234 0x49C 0x000 0x5 0x0 #define MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22 0x234 0x49C 0x000 0x5 0x0
#define MX8MM_IOMUXC_UART1_RXD_TPSMP_HDATA24 0x234 0x49C 0x000 0x7 0x0 #define MX8MM_IOMUXC_UART1_RXD_TPSMP_HDATA24 0x234 0x49C 0x000 0x7 0x0
#define MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x238 0x4A0 0x000 0x0 0x0 #define MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x238 0x4A0 0x000 0x0 0x0
#define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX 0x238 0x4A0 0x4F4 0x0 0x0 #define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX 0x238 0x4A0 0x4F4 0x0 0x1
#define MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x238 0x4A0 0x000 0x1 0x0 #define MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x238 0x4A0 0x000 0x1 0x0
#define MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23 0x238 0x4A0 0x000 0x5 0x0 #define MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23 0x238 0x4A0 0x000 0x5 0x0
#define MX8MM_IOMUXC_UART1_TXD_TPSMP_HDATA25 0x238 0x4A0 0x000 0x7 0x0 #define MX8MM_IOMUXC_UART1_TXD_TPSMP_HDATA25 0x238 0x4A0 0x000 0x7 0x0
......
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x-rs232-rts.dtso
View file @ 42c78a5b
...@@ -33,7 +33,6 @@ &uart2 { ...@@ -33,7 +33,6 @@ &uart2 {
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso
View file @ 42c78a5b
...@@ -33,7 +33,6 @@ &uart2 { ...@@ -33,7 +33,6 @@ &uart2 {
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
View file @ 42c78a5b
...@@ -222,7 +222,6 @@ &uart3 { ...@@ -222,7 +222,6 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
bluetooth { bluetooth {
......
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
View file @ 42c78a5b
...@@ -733,7 +733,6 @@ &uart1 { ...@@ -733,7 +733,6 @@ &uart1 {
dtr-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; dtr-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; dcd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
...@@ -749,7 +748,6 @@ &uart3 { ...@@ -749,7 +748,6 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
cts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
...@@ -758,7 +756,6 @@ &uart4 { ...@@ -758,7 +756,6 @@ &uart4 {
pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_uart4_gpio>; pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_uart4_gpio>;
cts-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
View file @ 42c78a5b
...@@ -664,7 +664,6 @@ &uart1 { ...@@ -664,7 +664,6 @@ &uart1 {
pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
...@@ -681,7 +680,6 @@ &uart3 { ...@@ -681,7 +680,6 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
bluetooth { bluetooth {
...@@ -699,7 +697,6 @@ &uart4 { ...@@ -699,7 +697,6 @@ &uart4 {
dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
View file @ 42c78a5b
...@@ -581,7 +581,6 @@ &uart1 { ...@@ -581,7 +581,6 @@ &uart1 {
dtr-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; dtr-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; dcd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
View file @ 42c78a5b
...@@ -98,6 +98,7 @@ reg_ethphy: regulator-ethphy { ...@@ -98,6 +98,7 @@ reg_ethphy: regulator-ethphy {
off-on-delay = <500000>; off-on-delay = <500000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_eth>; pinctrl-0 = <&pinctrl_reg_eth>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
......
arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
View file @ 42c78a5b
...@@ -643,7 +643,6 @@ &uart3 { ...@@ -643,7 +643,6 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
bluetooth { bluetooth {
......
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
View file @ 42c78a5b
...@@ -623,7 +623,6 @@ &uart3 { ...@@ -623,7 +623,6 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
cts-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
bluetooth { bluetooth {
......
drivers/bus/sunxi-rsb.c
View file @ 42c78a5b
...@@ -857,7 +857,13 @@ static int __init sunxi_rsb_init(void) ...@@ -857,7 +857,13 @@ static int __init sunxi_rsb_init(void)
return ret; return ret;
} }
return platform_driver_register(&sunxi_rsb_driver); ret = platform_driver_register(&sunxi_rsb_driver);
if (ret) {
bus_unregister(&sunxi_rsb_bus);
return ret;
}
return 0;
} }
module_init(sunxi_rsb_init); module_init(sunxi_rsb_init);
......
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