Commit 43c1ab59 authored by Martin Dalecki's avatar Martin Dalecki Committed by Linus Torvalds

[PATCH] 2.5.8 IDE 38

- Fix typo in ide_cmd_ioctl().

- Fix typo in cris driver.

- Don't retry operations on medium errors. (pointed out by Eric Andersen).

- Attach the no_io_32bit, io_32bit, no_unmask, unmask and slow fields to the
   ata_channel instead of the ata_device structure. They are a property of the
   channel and not just the devices attached to it. This allowed us to fix the
   set_io_32bit function by removing the CONFIG_BLK_DEV_DTC2278 conditional. In
   fact initialization shows that this is fixing many other host chipsets as
   well since all of them did expect sometimes particular values for those
   parameters in paralell on both drives attached to a channel but we where
   allowed to apply different values on a per drive basis.

- The keep_settings flag is now unconditional and we don't mess with any
   channel parameters before drive reset. Some chipsets really really expect
   unconditionally that the tweaks they apply are always present and this wasn't
   honoured thus far! We are expecting the user to have good reasons for
   manually tweaking the settings.

- Don't reset io_32bit in ata_pre_reset() unconditionally. There are chipsets
   out there which expect io_32bit to be *allways* enabled!

- Remove many obsolete and nawadays just confusing documentation from ide.txt
parent 485dc02f
This diff is collapsed.
......@@ -280,7 +280,7 @@ init_e100_ide (void)
hwif->tuneproc = &tune_e100_ide;
hwif->dmaproc = &e100_dmaproc;
hwif->ata_read = e100_ide_input_data;
hwif->ata_write = e100_ide_input_data;
hwif->ata_write = e100_ide_output_data;
hwif->atapi_read = e100_atapi_read;
hwif->atapi_write = e100_atapi_write;
}
......@@ -560,32 +560,6 @@ e100_ide_output_data (ide_drive_t *drive, void *buffer, unsigned int wcount)
e100_atapi_write(drive, buffer, wcount << 2);
}
/*
* The multiplexor for ide_xxxput_data and atapi calls
*/
static void
e100_ideproc (ide_ide_action_t func, ide_drive_t *drive,
void *buffer, unsigned int length)
{
switch (func) {
case ideproc_ide_input_data:
e100_ide_input_data(drive, buffer, length);
break;
case ideproc_ide_output_data:
e100_ide_input_data(drive, buffer, length);
break;
case ideproc_atapi_read:
e100_atapi_read(drive, buffer, length);
break;
case ideproc_atapi_write:
e100_atapi_write(drive, buffer, length);
break;
default:
printk("e100_ideproc: unsupported func %d!\n", func);
break;
}
}
/* we only have one DMA channel on the chip for ATA, so we can keep these statically */
static etrax_dma_descr ata_descrs[MAX_DMA_DESCRS];
static unsigned int ata_tot_size;
......
......@@ -422,9 +422,10 @@ void __init ide_init_amd74xx(struct ata_channel *hwif)
hwif->speedproc = &amd_set_drive;
hwif->autodma = 0;
hwif->io_32bit = 1;
hwif->unmask = 1;
for (i = 0; i < 2; i++) {
hwif->drives[i].io_32bit = 1;
hwif->drives[i].unmask = 1;
hwif->drives[i].autotune = 1;
hwif->drives[i].dn = hwif->unit * 2 + i;
}
......
......@@ -21,7 +21,7 @@
*
* A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
* bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
* chrisc@dbass.demon.co.uk, dalecki@evision-ventures.com,
* chrisc@dbass.demon.co.uk, martin@dalecki.de,
* derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
* flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
* j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
......@@ -403,19 +403,19 @@ void cmd640_dump_regs (void)
*/
static void __init check_prefetch (unsigned int index)
{
ide_drive_t *drive = cmd_drives[index];
struct ata_device *drive = cmd_drives[index];
byte b = get_cmd640_reg(prefetch_regs[index]);
if (b & prefetch_masks[index]) { /* is prefetch off? */
drive->no_unmask = 0;
drive->no_io_32bit = 1;
drive->io_32bit = 0;
drive->channel->no_unmask = 0;
drive->channel->no_io_32bit = 1;
drive->channel->io_32bit = 0;
} else {
#if CMD640_PREFETCH_MASKS
drive->no_unmask = 1;
drive->unmask = 0;
drive->channel->no_unmask = 1;
drive->channel->unmask = 0;
#endif
drive->no_io_32bit = 0;
drive->channel->no_io_32bit = 0;
}
}
......@@ -460,15 +460,15 @@ static void set_prefetch_mode (unsigned int index, int mode)
b = get_cmd640_reg(reg);
if (mode) { /* want prefetch on? */
#if CMD640_PREFETCH_MASKS
drive->no_unmask = 1;
drive->unmask = 0;
drive->channel->no_unmask = 1;
drive->channel->unmask = 0;
#endif
drive->no_io_32bit = 0;
drive->channel->no_io_32bit = 0;
b &= ~prefetch_masks[index]; /* enable prefetch */
} else {
drive->no_unmask = 0;
drive->no_io_32bit = 1;
drive->io_32bit = 0;
drive->channel->no_unmask = 0;
drive->channel->no_io_32bit = 1;
drive->channel->io_32bit = 0;
b |= prefetch_masks[index]; /* disable prefetch */
}
put_cmd640_reg(reg, b);
......@@ -827,7 +827,7 @@ int __init ide_probe_for_cmd640x(void)
retrieve_drive_counts (index);
check_prefetch (index);
printk("cmd640: drive%d timings/prefetch(%s) preserved",
index, drive->no_io_32bit ? "off" : "on");
index, drive->channel->no_io_32bit ? "off" : "on");
display_clocks(index);
}
#else
......@@ -836,7 +836,7 @@ int __init ide_probe_for_cmd640x(void)
*/
check_prefetch (index);
printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
index, drive->no_io_32bit ? "off" : "on");
index, drive->channel->no_io_32bit ? "off" : "on");
#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
}
......
......@@ -88,8 +88,7 @@ static void tune_dtc2278 (ide_drive_t *drive, byte pio)
/*
* 32bit I/O has to be enabled for *both* drives at the same time.
*/
drive->io_32bit = 1;
drive->channel->drives[!drive->select.b.unit].io_32bit = 1;
drive->channel->io_32bit = 1;
}
void __init init_dtc2278 (void)
......@@ -120,10 +119,11 @@ void __init init_dtc2278 (void)
ide_hwifs[0].chipset = ide_dtc2278;
ide_hwifs[1].chipset = ide_dtc2278;
ide_hwifs[0].tuneproc = &tune_dtc2278;
ide_hwifs[0].drives[0].no_unmask = 1;
ide_hwifs[0].drives[1].no_unmask = 1;
ide_hwifs[1].drives[0].no_unmask = 1;
ide_hwifs[1].drives[1].no_unmask = 1;
/* FIXME: What about the following?!
ide_hwifs[1].tuneproc = &tune_dtc2278;
*/
ide_hwifs[0].no_unmask = 1;
ide_hwifs[1].no_unmask = 1;
ide_hwifs[0].unit = ATA_PRIMARY;
ide_hwifs[1].unit = ATA_SECONDARY;
}
......@@ -261,11 +261,11 @@ static void ht_set_prefetch(ide_drive_t *drive, byte state)
*/
if (state) {
drive->drive_data |= t; /* enable prefetch mode */
drive->no_unmask = 1;
drive->unmask = 0;
drive->channel->no_unmask = 1;
drive->channel->unmask = 0;
} else {
drive->drive_data &= ~t; /* disable prefetch mode */
drive->no_unmask = 0;
drive->channel->no_unmask = 0;
}
restore_flags (flags); /* all CPUs */
......
......@@ -669,6 +669,12 @@ static int cdrom_decode_status (ide_startstop_t *startstop, ide_drive_t *drive,
request or data protect error.*/
ide_dump_status (drive, "command error", stat);
cdrom_end_request(drive, 0);
} else if (sense_key == MEDIUM_ERROR) {
/* No point in re-trying a zillion times on a bad
* sector. The error is not correctable at all.
*/
ide_dump_status (drive, "media error (bad sector)", stat);
cdrom_end_request(drive, 0);
} else if ((err & ~ABRT_ERR) != 0) {
/* Go to the default handler
for other errors. */
......
......@@ -755,8 +755,6 @@ static void idedisk_pre_reset (ide_drive_t *drive)
drive->special.b.recalibrate = legacy;
if (OK_TO_RESET_CONTROLLER)
drive->mult_count = 0;
if (!drive->keep_settings && !drive->using_dma)
drive->mult_req = 0;
if (drive->mult_req != drive->mult_count)
drive->special.b.set_multmode = 1;
}
......@@ -1231,7 +1229,14 @@ static void idedisk_setup(ide_drive_t *drive)
drive->special.b.set_multmode = 1;
#endif
}
drive->no_io_32bit = id->dword_io ? 1 : 0;
/* FIXME: Nowadays there are many chipsets out there which *require* 32
* bit IO. Those will most propably not work properly with drives not
* supporting this. But right now we don't do anything about this. We
* dont' even *warn* the user!
*/
drive->channel->no_io_32bit = id->dword_io ? 1 : 0;
if (drive->id->cfs_enable_2 & 0x3000)
write_cache(drive, (id->cfs_enable_2 & 0x3000));
......
......@@ -156,7 +156,7 @@ void ata_read(ide_drive_t *drive, void *buffer, unsigned int wcount)
return;
}
io_32bit = drive->io_32bit;
io_32bit = drive->channel->io_32bit;
if (io_32bit) {
#if SUPPORT_VLB_SYNC
......@@ -167,7 +167,7 @@ void ata_read(ide_drive_t *drive, void *buffer, unsigned int wcount)
ata_read_32(drive, buffer, wcount);
} else {
#if SUPPORT_SLOW_DATA_PORTS
if (drive->slow)
if (drive->channel->slow)
ata_read_slow(drive, buffer, wcount);
else
#endif
......@@ -187,7 +187,7 @@ void ata_write(ide_drive_t *drive, void *buffer, unsigned int wcount)
return;
}
io_32bit = drive->io_32bit;
io_32bit = drive->channel->io_32bit;
if (io_32bit) {
#if SUPPORT_VLB_SYNC
......@@ -198,7 +198,7 @@ void ata_write(ide_drive_t *drive, void *buffer, unsigned int wcount)
ata_write_32(drive, buffer, wcount);
} else {
#if SUPPORT_SLOW_DATA_PORTS
if (drive->slow)
if (drive->channel->slow)
ata_write_slow(drive, buffer, wcount);
else
#endif
......@@ -976,6 +976,7 @@ int ide_cmd_ioctl(ide_drive_t *drive, unsigned long arg)
if (argbuf == NULL)
return -ENOMEM;
memcpy(argbuf, vals, 4);
memset(argbuf + 4, 0, argsize - 4);
}
if (set_transfer(drive, &args)) {
......@@ -986,14 +987,8 @@ int ide_cmd_ioctl(ide_drive_t *drive, unsigned long arg)
/* Issue ATA command and wait for completion.
*/
/* FIXME: Do we really have to zero out the buffer?
*/
memset(argbuf, 4, SECTOR_WORDS * 4 * vals[3]);
ide_init_drive_cmd(&rq);
rq.buffer = argbuf;
memcpy(argbuf, vals, 4);
err = ide_do_drive_cmd(drive, &rq, ide_wait);
if (!err && xfer_rate) {
......
......@@ -479,22 +479,18 @@ static void ata_pre_reset(ide_drive_t *drive)
if (ata_ops(drive) && ata_ops(drive)->pre_reset)
ata_ops(drive)->pre_reset(drive);
if (!drive->keep_settings && !drive->using_dma) {
drive->unmask = 0;
drive->io_32bit = 0;
}
if (!drive->using_dma)
return;
if (drive->using_dma) {
/* check the DMA crc count */
if (drive->crc_count) {
drive->channel->dmaproc(ide_dma_off_quietly, drive);
if ((drive->channel->speedproc) != NULL)
drive->channel->speedproc(drive, ide_auto_reduce_xfer(drive));
if (drive->current_speed >= XFER_SW_DMA_0)
drive->channel->dmaproc(ide_dma_on, drive);
} else
drive->channel->dmaproc(ide_dma_off, drive);
}
/* check the DMA crc count */
if (drive->crc_count) {
drive->channel->dmaproc(ide_dma_off_quietly, drive);
if ((drive->channel->speedproc) != NULL)
drive->channel->speedproc(drive, ide_auto_reduce_xfer(drive));
if (drive->current_speed >= XFER_SW_DMA_0)
drive->channel->dmaproc(ide_dma_on, drive);
} else
drive->channel->dmaproc(ide_dma_off, drive);
}
/*
......@@ -905,17 +901,15 @@ byte ide_dump_status (ide_drive_t *drive, const char *msg, byte stat)
*/
static void try_to_flush_leftover_data (ide_drive_t *drive)
{
int i = (drive->mult_count ? drive->mult_count : 1);
int i;
if (drive->type != ATA_DISK)
return;
while (i > 0) {
for (i = (drive->mult_count ? drive->mult_count : 1); i > 0; --i) {
u32 buffer[SECTOR_WORDS];
unsigned int count = (i > 1) ? 1 : i;
ata_read(drive, buffer, count * SECTOR_WORDS);
i -= count;
ata_read(drive, buffer, SECTOR_WORDS);
}
}
......@@ -999,7 +993,7 @@ void ide_cmd(ide_drive_t *drive, byte cmd, byte nsect, ide_handler_t *handler)
/*
* Invoked on completion of a special DRIVE_CMD.
*/
static ide_startstop_t drive_cmd_intr (ide_drive_t *drive)
static ide_startstop_t drive_cmd_intr(ide_drive_t *drive)
{
struct request *rq = HWGROUP(drive)->rq;
u8 *args = rq->buffer;
......@@ -1008,11 +1002,7 @@ static ide_startstop_t drive_cmd_intr (ide_drive_t *drive)
ide__sti(); /* local CPU only */
if ((stat & DRQ_STAT) && args && args[3]) {
int io_32bit = drive->io_32bit;
drive->io_32bit = 0;
ata_read(drive, &args[4], args[3] * SECTOR_WORDS);
drive->io_32bit = io_32bit;
while (((stat = GET_STAT()) & BUSY_STAT) && retries--)
udelay(100);
......@@ -1824,7 +1814,7 @@ void ide_intr(int irq, void *dev_id, struct pt_regs *regs)
del_timer(&hwgroup->timer);
spin_unlock(&ide_lock);
if (drive->unmask)
if (hwif->unmask)
ide__sti(); /* local CPU only */
startstop = handler(drive); /* service this interrupt, may set handler for next interrupt */
spin_lock_irq(&ide_lock);
......@@ -2572,14 +2562,10 @@ int ide_write_setting (ide_drive_t *drive, ide_settings_t *setting, int val)
static int set_io_32bit(struct ata_device *drive, int arg)
{
if (drive->no_io_32bit)
if (drive->channel->no_io_32bit)
return -EIO;
drive->io_32bit = arg;
#ifdef CONFIG_BLK_DEV_DTC2278
if (drive->channel->chipset == ide_dtc2278)
drive->channel->drives[!drive->select.b.unit].io_32bit = arg;
#endif
drive->channel->io_32bit = arg;
return 0;
}
......@@ -2613,11 +2599,10 @@ static int set_pio_mode (ide_drive_t *drive, int arg)
void ide_add_generic_settings (ide_drive_t *drive)
{
/* drive setting name read/write access read ioctl write ioctl data type min max mul_factor div_factor data pointer set function */
ide_add_setting(drive, "io_32bit", drive->no_io_32bit ? SETTING_READ : SETTING_RW, HDIO_GET_32BIT, HDIO_SET_32BIT, TYPE_BYTE, 0, 1 + (SUPPORT_VLB_SYNC << 1), 1, 1, &drive->io_32bit, set_io_32bit);
ide_add_setting(drive, "keepsettings", SETTING_RW, HDIO_GET_KEEPSETTINGS, HDIO_SET_KEEPSETTINGS, TYPE_BYTE, 0, 1, 1, 1, &drive->keep_settings, NULL);
ide_add_setting(drive, "io_32bit", drive->channel->no_io_32bit ? SETTING_READ : SETTING_RW, HDIO_GET_32BIT, HDIO_SET_32BIT, TYPE_BYTE, 0, 1 + (SUPPORT_VLB_SYNC << 1), 1, 1, &drive->channel->io_32bit, set_io_32bit);
ide_add_setting(drive, "pio_mode", SETTING_WRITE, -1, HDIO_SET_PIO_MODE, TYPE_BYTE, 0, 255, 1, 1, NULL, set_pio_mode);
ide_add_setting(drive, "slow", SETTING_RW, -1, -1, TYPE_BYTE, 0, 1, 1, 1, &drive->slow, NULL);
ide_add_setting(drive, "unmaskirq", drive->no_unmask ? SETTING_READ : SETTING_RW, HDIO_GET_UNMASKINTR, HDIO_SET_UNMASKINTR, TYPE_BYTE, 0, 1, 1, 1, &drive->unmask, NULL);
ide_add_setting(drive, "slow", SETTING_RW, -1, -1, TYPE_BYTE, 0, 1, 1, 1, &drive->channel->slow, NULL);
ide_add_setting(drive, "unmaskirq", drive->channel->no_unmask ? SETTING_READ : SETTING_RW, HDIO_GET_UNMASKINTR, HDIO_SET_UNMASKINTR, TYPE_BYTE, 0, 1, 1, 1, &drive->channel->unmask, NULL);
ide_add_setting(drive, "using_dma", SETTING_RW, HDIO_GET_DMA, HDIO_SET_DMA, TYPE_BYTE, 0, 1, 1, 1, &drive->using_dma, set_using_dma);
ide_add_setting(drive, "ide_scsi", SETTING_RW, -1, -1, TYPE_BYTE, 0, 1, 1, 1, &drive->scsi, NULL);
ide_add_setting(drive, "init_speed", SETTING_RW, -1, -1, TYPE_BYTE, 0, 69, 1, 1, &drive->init_speed, NULL);
......@@ -3182,7 +3167,7 @@ int __init ide_setup (char *s)
drive->autotune = 2;
goto done;
case -8: /* "slow" */
drive->slow = 1;
hwif->slow = 1;
goto done;
case -9: /* "flash" */
drive->ata_flash = 1;
......
......@@ -1268,11 +1268,8 @@ void __init ide_init_pdc202xx(struct ata_channel *hwif)
#undef CONFIG_PDC202XX_32_UNMASK
#ifdef CONFIG_PDC202XX_32_UNMASK
hwif->drives[0].io_32bit = 1;
hwif->drives[1].io_32bit = 1;
hwif->drives[0].unmask = 1;
hwif->drives[1].unmask = 1;
hwif->io_32bit = 1;
hwif->unmask = 1;
#endif
#ifdef CONFIG_BLK_DEV_IDEDMA
......
......@@ -250,11 +250,9 @@ int __init setup_pdc4030(struct ata_channel *hwif)
memcpy(hwif2->io_ports, hwif->hw.io_ports, sizeof(hwif2->io_ports));
hwif2->irq = hwif->irq;
hwif2->hw.irq = hwif->hw.irq = hwif->irq;
hwif->io_32bit = 3;
hwif2->io_32bit = 3;
for (i=0; i<2 ; i++) {
hwif->drives[i].io_32bit = 3;
hwif2->drives[i].io_32bit = 3;
hwif->drives[i].keep_settings = 1;
hwif2->drives[i].keep_settings = 1;
if (!ident.current_tm[i].cyl)
hwif->drives[i].noprobe = 1;
if (!ident.current_tm[i+2].cyl)
......@@ -634,7 +632,7 @@ ide_startstop_t do_pdc4030_io(ide_drive_t *drive, struct ata_taskfile *task)
"PROMISE_WRITE\n", drive->name);
return startstop;
}
if (!drive->unmask)
if (!drive->channel->unmask)
__cli(); /* local CPU only */
HWGROUP(drive)->wrq = *rq; /* scratchpad */
return promise_write(drive);
......
......@@ -545,10 +545,9 @@ void __init ide_init_piix(struct ata_channel *hwif)
hwif->tuneproc = &piix_tune_drive;
hwif->speedproc = &piix_set_drive;
hwif->autodma = 0;
hwif->io_32bit = 1;
hwif->unmask = 1;
for (i = 0; i < 2; i++) {
hwif->drives[i].io_32bit = 1;
hwif->drives[i].unmask = 1;
hwif->drives[i].autotune = 1;
hwif->drives[i].dn = hwif->unit * 2 + i;
}
......
......@@ -370,8 +370,7 @@ int __init probe (int base)
hwif->config_data = config;
hwif->drives[0].drive_data =
hwif->drives[1].drive_data = QD6500_DEF_DATA;
hwif->drives[0].io_32bit =
hwif->drives[1].io_32bit = 1;
hwif->io_32bit = 1;
hwif->tuneproc = &qd6500_tune_drive;
return 1;
}
......@@ -403,8 +402,7 @@ int __init probe (int base)
hwif->config_data = config | (control <<8);
hwif->drives[0].drive_data =
hwif->drives[1].drive_data = QD6580_DEF_DATA;
hwif->drives[0].io_32bit =
hwif->drives[1].io_32bit = 1;
hwif->io_32bit = 1;
hwif->tuneproc = &qd6580_tune_drive;
qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
......@@ -426,11 +424,11 @@ int __init probe (int base)
ide_hwifs[i].select_data = base;
ide_hwifs[i].config_data = config | (control <<8);
ide_hwifs[i].tuneproc = &qd6580_tune_drive;
ide_hwifs[i].io_32bit = 1;
for (j = 0; j < 2; j++) {
ide_hwifs[i].drives[j].drive_data =
i?QD6580_DEF_DATA2:QD6580_DEF_DATA;
ide_hwifs[i].drives[j].io_32bit = 1;
}
}
......
......@@ -40,8 +40,7 @@ void __init ide_init_rz1000(struct ata_channel *hwif) /* called from ide-pci.c *
printk("%s: disabled chipset read-ahead (buggy RZ1000/RZ1001)\n", hwif->name);
} else {
hwif->serialized = 1;
hwif->drives[0].no_unmask = 1;
hwif->drives[1].no_unmask = 1;
hwif->no_unmask = 1;
printk("%s: serialized, disabled unmasking (buggy RZ1000/RZ1001)\n", hwif->name);
}
}
......
......@@ -535,10 +535,10 @@ void __init ide_init_via82cxxx(struct ata_channel *hwif)
hwif->tuneproc = &via82cxxx_tune_drive;
hwif->speedproc = &via_set_drive;
hwif->autodma = 0;
hwif->io_32bit = 1;
hwif->unmask = (via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
for (i = 0; i < 2; i++) {
hwif->drives[i].io_32bit = 1;
hwif->drives[i].unmask = (via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
hwif->drives[i].autotune = 1;
hwif->drives[i].dn = hwif->unit * 2 + i;
}
......
......@@ -296,7 +296,6 @@ struct hd_big_geometry {
#define HDIO_GET_MULTCOUNT 0x0304 /* get current IDE blockmode setting */
#define HDIO_GET_QDMA 0x0305 /* get use-qdma flag */
#define HDIO_OBSOLETE_IDENTITY 0x0307 /* OBSOLETE, DO NOT USE: returns 142 bytes */
#define HDIO_GET_KEEPSETTINGS 0x0308 /* get keep-settings-on-reset flag */
#define HDIO_GET_32BIT 0x0309 /* get current io_32bit setting */
#define HDIO_GET_NOWERR 0x030a /* get ignore-write-error flag */
#define HDIO_GET_DMA 0x030b /* get use-dma flag */
......@@ -316,7 +315,6 @@ struct hd_big_geometry {
/* hd/ide ctl's that pass (arg) non-ptr values are numbered 0x032n/0x033n */
#define HDIO_SET_MULTCOUNT 0x0321 /* change IDE blockmode */
#define HDIO_SET_UNMASKINTR 0x0322 /* permit other irqs during I/O */
#define HDIO_SET_KEEPSETTINGS 0x0323 /* keep ioctl settings on reset */
#define HDIO_SET_32BIT 0x0324 /* change io_32bit flags */
#define HDIO_SET_NOWERR 0x0325 /* change ignore-write-error flag */
#define HDIO_SET_DMA 0x0326 /* change use-dma flag */
......
......@@ -342,12 +342,10 @@ struct ata_device {
unsigned long PADAM_timeout; /* max time to wait for irq */
special_t special; /* special action flags */
byte keep_settings; /* restore settings after drive reset */
byte using_dma; /* disk is using dma for read/write */
byte using_tcq; /* disk is using queued dma operations*/
byte retry_pio; /* retrying dma capable host in pio */
byte state; /* retry state */
byte unmask; /* flag: okay to unmask other irqs */
byte dsc_overlap; /* flag: DSC overlap */
unsigned waiting_for_dma: 1; /* dma currently in progress */
......@@ -358,7 +356,6 @@ struct ata_device {
unsigned noprobe : 1; /* from: hdx=noprobe */
unsigned removable : 1; /* 1 if need to do check_media_change */
unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
unsigned no_unmask : 1; /* disallow setting unmask bit */
unsigned nobios : 1; /* flag: do not probe bios for drive */
unsigned revalidate : 1; /* request revalidation */
unsigned atapi_overlap : 1; /* flag: ATAPI overlap (not supported) */
......@@ -388,13 +385,6 @@ struct ata_device {
unsigned long long capacity48; /* total number of sectors */
unsigned int drive_data; /* for use by tuneproc/selectproc as needed */
/* FIXME: Those are properties of a channel and not a drive! Move them
* later there.
*/
byte slow; /* flag: slow data port */
unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
byte io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
wait_queue_head_t wqueue; /* used to wait for drive in open() */
struct hd_driveid *id; /* drive model identification info */
......@@ -523,6 +513,12 @@ struct ata_channel {
unsigned autodma : 1; /* automatically try to enable DMA at boot */
unsigned udma_four : 1; /* 1=ATA-66 capable, 0=default */
unsigned highmem : 1; /* can do full 32-bit dma */
byte slow; /* flag: slow data port */
unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
byte io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
unsigned no_unmask : 1; /* disallow setting unmask bit */
byte unmask; /* flag: okay to unmask other irqs */
#if (DISK_RECOVERY_TIME > 0)
unsigned long last_time; /* time when previous rq was done */
#endif
......
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