Commit 44385120 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A small fix for the newly added oxnas clk driver and a handful of
  rockchip clk driver fixes for newly added rk3399 support"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: Fix return value check in oxnas_stdclk_probe()
  clk: rockchip: release io resource when failing to init clk on rk3399
  clk: rockchip: fix cpuclk registration error handling
  clk: rockchip: Revert "clk: rockchip: reset init state before mmc card initialization"
  clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src
  clk: rockchip: mark rk3399 GIC clocks as critical
  clk: rockchip: initialize flags of clk_init_data in mmc-phase clock
parents dbdc3bb7 08634770
...@@ -144,9 +144,9 @@ static int oxnas_stdclk_probe(struct platform_device *pdev) ...@@ -144,9 +144,9 @@ static int oxnas_stdclk_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
regmap = syscon_node_to_regmap(of_get_parent(np)); regmap = syscon_node_to_regmap(of_get_parent(np));
if (!regmap) { if (IS_ERR(regmap)) {
dev_err(&pdev->dev, "failed to have parent regmap\n"); dev_err(&pdev->dev, "failed to have parent regmap\n");
return -EINVAL; return PTR_ERR(regmap);
} }
for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) { for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) {
......
...@@ -321,9 +321,9 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, ...@@ -321,9 +321,9 @@ struct clk *rockchip_clk_register_cpuclk(const char *name,
} }
cclk = clk_register(NULL, &cpuclk->hw); cclk = clk_register(NULL, &cpuclk->hw);
if (IS_ERR(clk)) { if (IS_ERR(cclk)) {
pr_err("%s: could not register cpuclk %s\n", __func__, name); pr_err("%s: could not register cpuclk %s\n", __func__, name);
ret = PTR_ERR(clk); ret = PTR_ERR(cclk);
goto free_rate_table; goto free_rate_table;
} }
......
...@@ -41,8 +41,6 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw, ...@@ -41,8 +41,6 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw,
#define ROCKCHIP_MMC_DEGREE_MASK 0x3 #define ROCKCHIP_MMC_DEGREE_MASK 0x3
#define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2
#define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET) #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
#define ROCKCHIP_MMC_INIT_STATE_RESET 0x1
#define ROCKCHIP_MMC_INIT_STATE_SHIFT 1
#define PSECS_PER_SEC 1000000000000LL #define PSECS_PER_SEC 1000000000000LL
...@@ -154,6 +152,7 @@ struct clk *rockchip_clk_register_mmc(const char *name, ...@@ -154,6 +152,7 @@ struct clk *rockchip_clk_register_mmc(const char *name,
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
init.name = name; init.name = name;
init.flags = 0;
init.num_parents = num_parents; init.num_parents = num_parents;
init.parent_names = parent_names; init.parent_names = parent_names;
init.ops = &rockchip_mmc_clk_ops; init.ops = &rockchip_mmc_clk_ops;
...@@ -162,15 +161,6 @@ struct clk *rockchip_clk_register_mmc(const char *name, ...@@ -162,15 +161,6 @@ struct clk *rockchip_clk_register_mmc(const char *name,
mmc_clock->reg = reg; mmc_clock->reg = reg;
mmc_clock->shift = shift; mmc_clock->shift = shift;
/*
* Assert init_state to soft reset the CLKGEN
* for mmc tuning phase and degree
*/
if (mmc_clock->shift == ROCKCHIP_MMC_INIT_STATE_SHIFT)
writel(HIWORD_UPDATE(ROCKCHIP_MMC_INIT_STATE_RESET,
ROCKCHIP_MMC_INIT_STATE_RESET,
mmc_clock->shift), mmc_clock->reg);
clk = clk_register(NULL, &mmc_clock->hw); clk = clk_register(NULL, &mmc_clock->hw);
if (IS_ERR(clk)) if (IS_ERR(clk))
kfree(mmc_clock); kfree(mmc_clock);
......
...@@ -832,9 +832,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { ...@@ -832,9 +832,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
RK3399_CLKGATE_CON(13), 1, GFLAGS), RK3399_CLKGATE_CON(13), 1, GFLAGS),
/* perihp */ /* perihp */
GATE(0, "cpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED, GATE(0, "cpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(5), 0, GFLAGS), RK3399_CLKGATE_CON(5), 0, GFLAGS),
GATE(0, "gpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED, GATE(0, "gpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(5), 1, GFLAGS), RK3399_CLKGATE_CON(5), 1, GFLAGS),
COMPOSITE(ACLK_PERIHP, "aclk_perihp", mux_aclk_perihp_p, CLK_IGNORE_UNUSED, COMPOSITE(ACLK_PERIHP, "aclk_perihp", mux_aclk_perihp_p, CLK_IGNORE_UNUSED,
RK3399_CLKSEL_CON(14), 7, 1, MFLAGS, 0, 5, DFLAGS, RK3399_CLKSEL_CON(14), 7, 1, MFLAGS, 0, 5, DFLAGS,
...@@ -1466,6 +1466,8 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = { ...@@ -1466,6 +1466,8 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
static const char *const rk3399_cru_critical_clocks[] __initconst = { static const char *const rk3399_cru_critical_clocks[] __initconst = {
"aclk_cci_pre", "aclk_cci_pre",
"aclk_gic",
"aclk_gic_noc",
"pclk_perilp0", "pclk_perilp0",
"pclk_perilp0", "pclk_perilp0",
"hclk_perilp0", "hclk_perilp0",
...@@ -1508,6 +1510,7 @@ static void __init rk3399_clk_init(struct device_node *np) ...@@ -1508,6 +1510,7 @@ static void __init rk3399_clk_init(struct device_node *np)
ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS); ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
if (IS_ERR(ctx)) { if (IS_ERR(ctx)) {
pr_err("%s: rockchip clk init failed\n", __func__); pr_err("%s: rockchip clk init failed\n", __func__);
iounmap(reg_base);
return; return;
} }
...@@ -1553,6 +1556,7 @@ static void __init rk3399_pmu_clk_init(struct device_node *np) ...@@ -1553,6 +1556,7 @@ static void __init rk3399_pmu_clk_init(struct device_node *np)
ctx = rockchip_clk_init(np, reg_base, CLKPMU_NR_CLKS); ctx = rockchip_clk_init(np, reg_base, CLKPMU_NR_CLKS);
if (IS_ERR(ctx)) { if (IS_ERR(ctx)) {
pr_err("%s: rockchip pmu clk init failed\n", __func__); pr_err("%s: rockchip pmu clk init failed\n", __func__);
iounmap(reg_base);
return; return;
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment