Commit 44a0554c authored by Zhao Qiang's avatar Zhao Qiang Committed by Scott Wood

QE: Add ucc hdlc document to bindings

Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: default avatarZhao Qiang <qiang.zhao@nxp.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarScott Wood <oss@buserror.net>
parent f0590990
......@@ -41,3 +41,84 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
* HDLC
Currently defined compatibles:
- fsl,ucc-hdlc
Properties for fsl,ucc-hdlc:
- rx-clock-name
- tx-clock-name
Usage: required
Value type: <string>
Definition : Must be "brg1"-"brg16" for internal clock source,
Must be "clk1"-"clk24" for external clock source.
- fsl,tdm-interface
Usage: optional
Value type: <empty>
Definition : Specify that hdlc is based on tdm-interface
The property below is dependent on fsl,tdm-interface:
- fsl,rx-sync-clock
Usage: required
Value type: <string>
Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
- fsl,tx-sync-clock
Usage: required
Value type: <string>
Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
- fsl,tdm-framer-type
Usage: required for tdm interface
Value type: <string>
Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
are not supported.
- fsl,tdm-id
Usage: required for tdm interface
Value type: <u32>
Definition : number of TDM ID
- fsl,tx-timeslot-mask
- fsl,rx-timeslot-mask
Usage: required for tdm interface
Value type: <u32>
Definition : time slot mask for TDM operation. Indicates which time
slots used for transmitting and receiving.
- fsl,siram-entry-id
Usage: required for tdm interface
Value type: <u32>
Definition : Must be 0,2,4...64. the number of TDM entry.
- fsl,tdm-internal-loopback
usage: optional for tdm interface
value type: <empty>
Definition : Internal loopback connecting on TDM layer.
Example for tdm interface:
ucc@2000 {
compatible = "fsl,ucc-hdlc";
rx-clock-name = "clk8";
tx-clock-name = "clk9";
fsl,rx-sync-clock = "rsync_pin";
fsl,tx-sync-clock = "tsync_pin";
fsl,tx-timeslot-mask = <0xfffffffe>;
fsl,rx-timeslot-mask = <0xfffffffe>;
fsl,tdm-framer-type = "e1";
fsl,tdm-id = <0>;
fsl,siram-entry-id = <0>;
fsl,tdm-interface;
};
Example for hdlc without tdm interface:
ucc@2000 {
compatible = "fsl,ucc-hdlc";
rx-clock-name = "brg1";
tx-clock-name = "brg1";
};
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