Commit 44fdf4ed authored by Qi Liu's avatar Qi Liu Committed by Will Deacon

arm64: perf: Remove unnecessary event_idx check

event_idx is obtained from armv8pmu_get_event_idx(), and this idx must be
between ARMV8_IDX_CYCLE_COUNTER and cpu_pmu->num_events. So it's unnecessary
to do this check. Let's remove it.
Signed-off-by: default avatarQi Liu <liuqi115@huawei.com>
Link: https://lore.kernel.org/r/1599213458-28394-1-git-send-email-liuqi115@huawei.comSigned-off-by: default avatarWill Deacon <will@kernel.org>
parent d51eb416
...@@ -310,8 +310,6 @@ static struct attribute_group armv8_pmuv3_format_attr_group = { ...@@ -310,8 +310,6 @@ static struct attribute_group armv8_pmuv3_format_attr_group = {
*/ */
#define ARMV8_IDX_CYCLE_COUNTER 0 #define ARMV8_IDX_CYCLE_COUNTER 0
#define ARMV8_IDX_COUNTER0 1 #define ARMV8_IDX_COUNTER0 1
#define ARMV8_IDX_COUNTER_LAST(cpu_pmu) \
(ARMV8_IDX_CYCLE_COUNTER + cpu_pmu->num_events - 1)
/* /*
...@@ -368,12 +366,6 @@ static inline int armv8pmu_has_overflowed(u32 pmovsr) ...@@ -368,12 +366,6 @@ static inline int armv8pmu_has_overflowed(u32 pmovsr)
return pmovsr & ARMV8_PMU_OVERFLOWED_MASK; return pmovsr & ARMV8_PMU_OVERFLOWED_MASK;
} }
static inline int armv8pmu_counter_valid(struct arm_pmu *cpu_pmu, int idx)
{
return idx >= ARMV8_IDX_CYCLE_COUNTER &&
idx <= ARMV8_IDX_COUNTER_LAST(cpu_pmu);
}
static inline int armv8pmu_counter_has_overflowed(u32 pmnc, int idx) static inline int armv8pmu_counter_has_overflowed(u32 pmnc, int idx)
{ {
return pmnc & BIT(ARMV8_IDX_TO_COUNTER(idx)); return pmnc & BIT(ARMV8_IDX_TO_COUNTER(idx));
...@@ -443,15 +435,11 @@ static u64 armv8pmu_unbias_long_counter(struct perf_event *event, u64 value) ...@@ -443,15 +435,11 @@ static u64 armv8pmu_unbias_long_counter(struct perf_event *event, u64 value)
static u64 armv8pmu_read_counter(struct perf_event *event) static u64 armv8pmu_read_counter(struct perf_event *event)
{ {
struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
struct hw_perf_event *hwc = &event->hw; struct hw_perf_event *hwc = &event->hw;
int idx = hwc->idx; int idx = hwc->idx;
u64 value = 0; u64 value = 0;
if (!armv8pmu_counter_valid(cpu_pmu, idx)) if (idx == ARMV8_IDX_CYCLE_COUNTER)
pr_err("CPU%u reading wrong counter %d\n",
smp_processor_id(), idx);
else if (idx == ARMV8_IDX_CYCLE_COUNTER)
value = read_sysreg(pmccntr_el0); value = read_sysreg(pmccntr_el0);
else else
value = armv8pmu_read_hw_counter(event); value = armv8pmu_read_hw_counter(event);
...@@ -480,16 +468,12 @@ static inline void armv8pmu_write_hw_counter(struct perf_event *event, ...@@ -480,16 +468,12 @@ static inline void armv8pmu_write_hw_counter(struct perf_event *event,
static void armv8pmu_write_counter(struct perf_event *event, u64 value) static void armv8pmu_write_counter(struct perf_event *event, u64 value)
{ {
struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
struct hw_perf_event *hwc = &event->hw; struct hw_perf_event *hwc = &event->hw;
int idx = hwc->idx; int idx = hwc->idx;
value = armv8pmu_bias_long_counter(event, value); value = armv8pmu_bias_long_counter(event, value);
if (!armv8pmu_counter_valid(cpu_pmu, idx)) if (idx == ARMV8_IDX_CYCLE_COUNTER)
pr_err("CPU%u writing wrong counter %d\n",
smp_processor_id(), idx);
else if (idx == ARMV8_IDX_CYCLE_COUNTER)
write_sysreg(value, pmccntr_el0); write_sysreg(value, pmccntr_el0);
else else
armv8pmu_write_hw_counter(event, value); armv8pmu_write_hw_counter(event, value);
......
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