Commit 4561c1da authored by Anton Blanchard's avatar Anton Blanchard

ppc64: xics cleanup

parent 4eee9ae9
......@@ -110,29 +110,6 @@ long plpar_put_term_char(unsigned long termno,
lbuf[0], lbuf[1], &dummy, &dummy, &dummy);
}
long plpar_eoi(unsigned long xirr)
{
return plpar_hcall_norets(H_EOI, xirr);
}
long plpar_cppr(unsigned long cppr)
{
return plpar_hcall_norets(H_CPPR, cppr);
}
long plpar_ipi(unsigned long servernum,
unsigned long mfrr)
{
return plpar_hcall_norets(H_IPI, servernum, mfrr);
}
long plpar_xirr(unsigned long *xirr_ret)
{
unsigned long dummy;
return plpar_hcall(H_XIRR, 0, 0, 0, 0,
xirr_ret, &dummy, &dummy);
}
static void tce_build_pSeriesLP(struct TceTable *tbl, long tcenum,
unsigned long uaddr, int direction )
{
......@@ -180,66 +157,6 @@ static void tce_free_one_pSeriesLP(struct TceTable *tbl, long tcenum)
}
/* PowerPC Interrupts for lpar. */
/* NOTE: this typedef is duplicated (for now) from xics.c! */
typedef struct {
int (*xirr_info_get)(int cpu);
void (*xirr_info_set)(int cpu, int val);
void (*cppr_info)(int cpu, u8 val);
void (*qirr_info)(int cpu, u8 val);
} xics_ops;
static int pSeriesLP_xirr_info_get(int n_cpu)
{
unsigned long lpar_rc;
unsigned long return_value;
lpar_rc = plpar_xirr(&return_value);
if (lpar_rc != H_Success) {
panic(" bad return code xirr - rc = %lx \n", lpar_rc);
}
return ((int)(return_value));
}
static void pSeriesLP_xirr_info_set(int n_cpu, int value)
{
unsigned long lpar_rc;
unsigned long val64 = value & 0xffffffff;
lpar_rc = plpar_eoi(val64);
if (lpar_rc != H_Success) {
panic(" bad return code EOI - rc = %ld, value=%lx \n", lpar_rc, val64);
}
}
static void pSeriesLP_cppr_info(int n_cpu, u8 value)
{
unsigned long lpar_rc;
lpar_rc = plpar_cppr(value);
if (lpar_rc != H_Success) {
panic(" bad return code cppr - rc = %lx \n", lpar_rc);
}
}
static void pSeriesLP_qirr_info(int n_cpu , u8 value)
{
unsigned long lpar_rc;
lpar_rc = plpar_ipi(n_cpu, value);
if (lpar_rc != H_Success) {
panic(" bad return code qirr -ipi - rc = %lx \n", lpar_rc);
}
}
xics_ops pSeriesLP_ops = {
pSeriesLP_xirr_info_get,
pSeriesLP_xirr_info_set,
pSeriesLP_cppr_info,
pSeriesLP_qirr_info
};
/* end TAI-LPAR */
int vtermno; /* virtual terminal# for udbg */
static void udbg_putcLP(unsigned char c)
......
......@@ -47,8 +47,9 @@
#include <asm/ppcdebug.h>
#include "open_pic.h"
#include <asm/machdep.h>
#include <asm/xics.h>
int smp_threads_ready = 0;
int smp_threads_ready;
unsigned long cache_decay_ticks;
/* initialised so it doesn't end up in bss */
......@@ -64,18 +65,6 @@ extern int cpu_idle(void *unused);
void smp_call_function_interrupt(void);
void smp_message_pass(int target, int msg, unsigned long data, int wait);
void xics_setup_cpu(void);
void xics_cause_IPI(int cpu);
/*
* XICS only has a single IPI, so encode the messages per CPU
*/
struct xics_ipi_struct {
volatile unsigned long value;
} ____cacheline_aligned;
struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
#define smp_message_pass(t,m,d,w) smp_ops->message_pass((t),(m),(d),(w))
static inline void set_tb(unsigned int upper, unsigned int lower)
......
This diff is collapsed.
......@@ -12,7 +12,17 @@
#ifndef _PPC64_KERNEL_XICS_H
#define _PPC64_KERNEL_XICS_H
#include <linux/cache.h>
void xics_init_IRQ(void);
int xics_get_irq(struct pt_regs *);
void xics_setup_cpu(void);
void xics_cause_IPI(int cpu);
struct xics_ipi_struct {
volatile unsigned long value;
} ____cacheline_aligned;
extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
#endif /* _PPC64_KERNEL_XICS_H */
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