Commit 45631ea8 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman

ARM: dts: meson: mark the clock controller also as reset controller

The clock controller provides a few reset lines as well. Add the
corresponding CPU cores.
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 40b5c4f3
...@@ -168,6 +168,7 @@ mux { ...@@ -168,6 +168,7 @@ mux {
&cbus { &cbus {
clkc: clock-controller@4000 { clkc: clock-controller@4000 {
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>;
compatible = "amlogic,meson8-clkc"; compatible = "amlogic,meson8-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>; reg = <0x8000 0x4>, <0x4000 0x460>;
}; };
......
...@@ -119,6 +119,7 @@ mux { ...@@ -119,6 +119,7 @@ mux {
&cbus { &cbus {
clkc: clock-controller@4000 { clkc: clock-controller@4000 {
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>;
compatible = "amlogic,meson8b-clkc"; compatible = "amlogic,meson8b-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>; reg = <0x8000 0x4>, <0x4000 0x460>;
}; };
......
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